Adjustable eUSB2 Drive-Low Duration for Long Differential Lines
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Solution Overview
Problem
In eUSB2 systems, longer differential signal lines cause propagation delays, leading to incomplete driving of signal lines low after an EOP indicator, resulting in the line state remaining at an elevated voltage level, which can hinder communication between eUSB2 and legacy USB systems.
Innovation Solution
The system drives differential signal lines low for a duration of 4 unit intervals plus the propagation delay, followed by placing them in a high-impedance state, ensuring complete clearance of residual voltage and allowing communication to resume without violating existing eUSB2 standards.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the differential signal lines are driven low for the standard duration of 4 unit intervals, then the system complies with eUSB2 standards, but the signal lines remain at an elevated voltage level due to propagation delay in long channels
Solution Approach 1:
The system performs preliminary action by extending the drive-low duration beyond the standard 4 unit intervals to account for propagation delay in long channels. The processor calculates the required extension based on channel length and drives the signal lines low for an additional period, ensuring complete voltage clearance before transitioning to high-impedance state.
Solution Approach 2:
The system applies dynamics by making the drive-low duration adjustable rather than fixed. The processor dynamically determines the appropriate driving duration based on the specific channel length and propagation delay characteristics, allowing the system to adapt to different cable lengths while maintaining compliance with eUSB2 standards.
2Reliability
If the differential signal lines are driven low for an extended duration to account for propagation delay, then complete voltage clearance is achieved, but the driving duration exceeds the standard 4 unit intervals specification
Solution Approach 1:
The system applies local quality by implementing different drive-low durations based on the specific channel characteristics. Rather than using a uniform duration for all channels, the processor calculates and applies a locally optimized duration based on the actual propagation delay of each channel, ensuring both complete voltage clearance and standard compliance for that specific implementation.
Solution Approach 2:
The system changes the time parameter of the drive-low operation from the fixed 4 unit intervals to a variable duration calculated as 4 unit intervals plus the measured propagation delay. This parameter adjustment ensures that the extended driving duration is precisely tailored to the channel characteristics while maintaining the foundational 4 UI requirement of the eUSB2 standard.
3Productivity
If the signal lines are placed in high-impedance state immediately after 4 unit intervals, then the system follows the standard protocol, but residual voltage remains on long channels causing communication issues
Solution Approach 1:
The system performs preliminary action by maintaining the drive-low state for an extended period beyond the standard 4 unit intervals, ensuring that the voltage clearance is complete before transitioning to high-impedance state. This preliminary extended driving prevents residual voltage from causing communication issues when the lines are released.
Solution Approach 2:
The system maintains continuous useful action by keeping the drive-low operation active for the extended duration needed to clear voltage on long channels. Rather than interrupting the driving action at the standard 4 UI mark, the continuous driving ensures complete voltage clearance, and only then does the system transition to the high-impedance state.
Data Source
AI summary
Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.