Gated Amplifiers TRIZ Cases

An adjustable 4 UI plus delay drive-low period clears residual voltage on long eUSB2 differential lines before high-impedance release.

Segmented front-end modules combine PA, LNA, duplexer, and switch paths to support multi-band carrier aggregation with lower signal degradation.

Input masking controls strong current pulses in pulse-mode TIAs to avoid saturation, cut distortion, and speed recovery.

A mirror bias circuit uses matched emitter followers and a 2Vbe node to stabilize quiescent current and reduce beta and battery sensitivity.

Switchable cascode LNAs replace passive splitters to improve channel isolation, hold input impedance, and reduce front-end loss in CA receivers.

Selective switching of parallel amplifier circuits cuts output current during gain reduction and backoff, helping preserve PAE.

Mode-switched biasing and transistor reconfiguration cut biosignal amplifier power use while preserving signal quality and reducing noise.

Auxiliary transistors extend the driver’s linear range, cutting distortion and power use while delivering large output voltage into low-ohm modulators.

Series-connected Class-D amplifiers isolate faults and avoid current contention to sustain alarm audio power with low loss.

Pre-charging the cascode gate capacitor cuts mode-switching latency while preserving noise filtering and bias stability.

Varactor diodes and adjustable loads let a CTLE tune peaking and pole locations for channel loss equalization with lower power and chip area.

A BiFET bias circuit isolates the RF amplifier reference voltage from switch drops, enabling logic-controlled bias current with stable output.

Shared common-base biasing cuts duplicate PA bias circuits, reducing area and control complexity while supporting multi-band RF output.

A controller reconfigures capacitor-switch networks by harmonic frequency, letting one power amplifier sustain efficiency across multiple bands.

Selective bank and amplifier activation based on composite RMS and peak power cuts RF transmitter power use in dynamic carrier systems.

Drain-voltage feedback keeps the common-gate transistor active longer, cutting cascode amplifier switching loss during turn-off.

When target output is below a reference level, switch circuits send RF signals through a bypass path to cut current use in multi-mode transmitters.

Removes RF path switches in carrier aggregation to preserve low noise figure, maintain band isolation, and reduce receiver size and cost.

Selective biasing of common base cascode stages enables multi-band RF splitting without band-switch loss, extra dies, or higher current drain.

MPMT switching lets one RFIC drive more eFEMs, easing PCB routing while avoiding extra RFIC size and power costs.

A parallel voltage and current amplifier uses selective control to drive resistive and capacitive loads stably while reducing power dissipation.

By removing the RF switch from the transmit path, this front-end module cuts insertion loss while preserving TX/RX isolation on one silicon substrate.

Selective unit-cell switching and tunable output matching keep load impedance stable across bands, reducing redesign cycles and RF power loss.

A shunt switch and programmable attenuators let one output driver match differential or single-ended power amplifiers while cutting balun loss and transformer area.

Switchable gamma inverting and feedback networks let a fixed-gate LNA maintain noise matching and low noise figure from 3 GHz to 11 GHz.

An unused band circuit placed between active transmit and receive paths cuts harmonic coupling and supports simultaneous multi-band communication.

Fast RF gain stepping uses impedance switching, frequency-response compensation, and charge injection to cut settling time and bias transients.

Shared output terminals switch between LVDS and single-end signals while CMFB stabilizes voltage and helps reduce semiconductor pin count.

A mid-node impedance network offsets parasitic capacitance in cascode LNAs, easing the gain versus input matching trade-off.

A sensed-condition boost converter raises PA supply voltage above battery level to add headroom, improving RF linearity and efficiency.

Pre-charged bias capacitors and switches speed RF power amplifier TDD on-off transitions while cutting charging current in MIMO systems.

Tunable load matching lets one multi-mode driver amplifier cover low and high transmit power paths with good efficiency, linearity, and lower circuit count.

Switchable grounding impedance detunes an idle RF power amplifier to cut receiver loading, noise figure, and output degradation.

Selective bias switching across RF power amplifiers with different output levels maintains efficiency over high-PAPR signals without extra combining circuitry.

A current-mode programmable gain amplifier inside the filter enables independent gain and frequency tuning with lower power and less bandwidth loss.

Adjustable source degeneration inductance helps a multi-output amplifier preserve gain, input matching, and dynamic range during carrier aggregation.

Adjustable capacitance in bypass mode attenuates an external oscillation signal to a target amplitude while preserving frequency and signal integrity.

Reverse power sensing detects peaking amplifier faults in a Doherty amplifier, enabling carrier-path fallback to preserve output power and ACLR.

A mirror bias path stabilizes power amplifier bias, cuts beta dependence, and preserves voltage headroom under process and battery variation.

A stacked variable filter overlaps PA stages and switches to shrink multiband front-end size while preserving filter characteristics and signal quality.

High-impedance TDD interface routing isolates PA and LNA paths without series RF switches, improving SNR, noise figure, and power use.

Multiple switchable cascode LNAs replace passive splitters to improve output isolation, cut front-end loss, and keep input impedance stable.

Separate FDD and TDD paths with envelope tracking and band filtering improve carrier aggregation efficiency while preserving signal quality.

A mode-switching crystal driver daisy chains sinusoidal clock signals across chips, restoring amplitude while reducing distortion and harmonics.

Voltage combining with carrier and peaking transformers improves Doherty back-off efficiency and linearity while simplifying impedance matching.

Serially programmed gain data lets a variable-gain RF amplifier switch by binary input between default and custom levels for consistent amplification.

Switchable variable resistance keeps amplifier input impedance stable across gain modes, reducing return loss and signal reflection.

A bypass circuit cuts load current during amplification, extending gain time and widening signal swing in low-voltage dynamic amplifiers.

Tunable matching and cascode shutoff let one LNA handle multiple carriers and bands while maintaining gain, noise figure, linearity, and input impedance.

Selective transformer switching isolates active carrier paths on a shared LDO power network, reducing high-frequency inter-carrier interference.