Eutectic Alloy Backside Layer for Low RDSON Semiconductor Attachment
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Solution Overview
Problem
Current semiconductor component attachment methods, such as silver sinter and solderable die attach techniques, face issues with high contact resistance and reliability due to silicon diffusion and oxidation, which adversely affect the drain-source on resistance (RDSON) and lead to voids and delamination.
Innovation Solution
A method involving the formation of a eutectic alloy composition on the back surface of a semiconductor wafer, followed by partial removal and deposition of a bonding layer, which reduces contact resistance and provides a barrier to silicon diffusion, thereby enhancing the attachment to secondary structures with low RDSON and improved barrier properties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silver sinter or solderable die attach techniques are used for semiconductor component attachment, then the attachment is achieved, but high contact resistance and reliability issues occur due to silicon diffusion and oxidation
Solution Approach 1:
The patent introduces a eutectic alloy layer as an intermediary between the silicon substrate and the bonding interface. This eutectic alloy prevents silicon diffusion and oxidation by acting as a protective barrier, while also providing low contact resistance for electrical connectivity. The eutectic alloy composition is specifically designed to be compatible with both the silicon substrate and the bonding materials.
Solution Approach 2:
The patent changes the physical and chemical parameters of the substrate surface by forming a eutectic alloy layer with specific composition and thickness. This transforms the surface properties to achieve both low contact resistance and protection against silicon diffusion, resolving the contradiction between electrical performance and reliability.
2Ease of manufacture
If conventional attachment methods are used, then the process is simple, but high RDSON results due to contact resistance issues
Solution Approach 1:
The eutectic alloy layer is formed on the substrate surface before the final bonding process. This preliminary action prepares the surface with optimal electrical and protective properties, ensuring low RDSON is achieved without complicating the subsequent bonding steps.
3Reliability
If no eutectic alloy layer is used, then the process is simpler, but contact resistance increases and reliability decreases
Solution Approach 1:
The eutectic alloy layer modifies the physical and chemical parameters of the bonding interface, providing both low contact resistance and protection against silicon diffusion. This single layer achieves multiple functions that would otherwise require complex multi-layer structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The approach results in semiconductor components with reduced RDSON and improved reliability by creating electrically conductive pathways and preventing silicon diffusion, leading to enhanced interconnection and packaging performance.
Implementation Method 1
provides a barrier to silicon diffusion
Implementation Method 2
creating electrically conductive pathways
Data Source
AI summary
A device wafer is provided that includes a substrate having major and minor surfaces, and a plurality of active devices located at the major surface. A eutectic alloy composition having a first thickness is formed at the minor surface of the substrate. The eutectic alloy composition is partially removed from the minor surface of the substrate such that a second thickness of the eutectic alloy composition remains on the minor surface, the second thickness being less than the first thickness. A bonding layer is deposited over the eutectic alloy composition. The bonding layer is utilized for joining semiconductor components of the device wafer to secondary structures.