EUV Lithography Negative Mask for Flare Reduction
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Solution Overview
Problem
Conventional semiconductor manufacturing methods face challenges in achieving high dimensional accuracy and exposure latitude due to flare issues in EUV lithography, particularly when forming fine gate patterns, which can result in reduced pattern resolution and increased unwanted wiring capacity.
Innovation Solution
The method involves using a negative exposure mask with a wiring pattern and a positive resist to form a reverse pattern, followed by developing the resist and patterning the hard coating film to create a hard mask pattern, allowing for the formation of a wiring pattern with reduced flare impact, employing EUV light and a reflective mask with an absorbing surface to minimize stray light.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a positive exposure mask with a wiring pattern is used in EUV lithography, then the wiring pattern can be transferred to the substrate, but flare is generated due to irregular reflection from the mask surface, reducing exposure contrast and dimension accuracy
Solution Approach 1:
The patent inverts the conventional positive mask approach by using a negative exposure mask where the wiring pattern regions have light-absorbing bodies and the peripheral regions have reflecting surfaces. This inversion transforms the source of flare from the pattern regions to the peripheral regions, thereby reducing flare impact on the transferred pattern and improving dimensional accuracy
Solution Approach 2:
The patent converts the potentially harmful flare effect into a beneficial outcome by strategically positioning reflecting surfaces in peripheral regions rather than pattern regions. The flare generated from peripheral regions does not compromise pattern fidelity, and the reflecting surfaces still serve their optical function while minimizing harmful effects on dimensionality
2Manufacturing precision
If the wavelength of exposure light is shortened to improve resolution for pattern miniaturization, then finer patterns can be formed, but flare becomes more problematic due to the reflective optical system required for EUV lithography
Solution Approach 1:
The patent extracts the light-absorbing function from the pattern regions and concentrates it in the wiring pattern areas of the negative mask. By separating the light absorption function from the light reflection function and placing them in different spatial regions (pattern vs. peripheral), the patent enables use of short-wavelength EUV light for high resolution while minimizing flare effects on the transferred pattern
3Manufacturing precision
If dummy patterns are arranged around the pattern to reduce flare, then dimension accuracy may be improved, but the device complexity and manufacturing process become more complicated
Solution Approach 1:
The patent makes the peripheral regions serve multiple functions: they act as light-absorbing dummy patterns to reduce flare effects, while simultaneously serving as the reflecting surface structure of the mask. This eliminates the need for separate dummy pattern additions and reduces overall device complexity
Solution Approach 2:
The patent incorporates flare-reducing structures directly into the mask design from the beginning, rather than adding dummy patterns as a separate preliminary step. The negative mask structure inherently includes light-absorbing bodies in peripheral regions, providing flare reduction as an integrated feature rather than an add-on
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces flare effects, enabling the production of densely integrated semiconductor devices with high yield and precise gate pattern formation, ensuring sufficient exposure latitude and dimensional accuracy.
Implementation Method 1
a positive resist 520 is formed on the substrate 501... irradiating the positive resist 520 with the exposure light 521 using the exposure mask 522
Implementation Method 2
an optical system including a mask is of reflective type... irradiating the positive resist 520 with the exposure light 521 using the exposure mask 522
Implementation Method 3
A light shielding body 553 for blocking exposure light is provided in a region corresponding to the wiring pattern
Data Source
AI summary
A reverse pattern is formed once by combining a negative exposure mask having a wiring pattern with a positive resist, and then a positive wiring pattern is formed by use of the reverse pattern. That is, a positive resist applied on a semiconductor substrate is exposed by use of the exposure mask having an opening part in a region corresponding to the wiring pattern, and then the exposed part is removed by development to form a resist pattern, thereby forming the wiring pattern in the region corresponding to the opening part of the resist pattern. Consequently, it is hardly affected by flare during EUV exposure, thereby fabricating a fine wiring pattern with higher exposure latitude.