Event-Driven Static Timing Analysis for Complex Clock Path Tracing

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Solution Overview

Problem

Existing static timing analysis methods for digital circuit designs, such as depth-first search (DFS) and breadth-first search (BFS), are inadequate for accurately tracing timing paths, particularly in complex clock networks, and require manual intervention to avoid false paths and model clock circuits, leading to inefficiencies and potential errors.

Innovation Solution

An event-driven static timing analysis approach that propagates primordial events through a digital circuit design based on time ordering, using a priority queue to sort events by timestamp, allowing for accurate tracking of temporal logic and power consumption, and detecting glitches without manual intervention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If depth-first search (DFS) or breadth-first search (BFS) is used for static timing analysis, then timing paths can be identified, but the accuracy of timing path tracing deteriorates in complex clock networks and requires manual intervention to avoid false paths

Engineering Contradiction:
Improvetiming path tracing accuracyVSAvoidcomplexity of clock network modeling
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The event-driven static timing analysis automatically traces timing paths by propagating events through the circuit based on temporal ordering, eliminating the need for manual intervention to guide the search process or specify input vectors, thereby achieving accurate timing path tracing in complex clock networks without requiring complex manual modeling

Inventive Principle:
Principle #25Self-service

2Reliability

If manual intervention is used to avoid false paths and model clock circuits, then timing analysis can be guided, but inefficiencies and potential errors increase

Engineering Contradiction:
Improvetiming analysis reliabilityVSAvoidtiming analysis efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system automatically performs timing analysis by propagating events through the circuit based on their timestamps, eliminating manual guidance and reducing both the potential for human error and the time required for analysis, while maintaining high reliability through systematic event propagation

Inventive Principle:
Principle #25Self-service

3Productivity

If event-driven static timing analysis is implemented, then runtime is reduced and path coverage is exhaustive, but the complexity of event propagation logic increases

Engineering Contradiction:
Improvetiming analysis runtimeVSAvoidcomplexity of event propagation logic
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The event-driven approach dynamically processes events in temporal order using a priority queue, allowing the system to adaptively trace only the relevant timing paths based on event timestamps, which reduces runtime and achieves exhaustive path coverage while managing complexity through systematic event processing

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12505271B2Event-driven tracing in static timing analysis of digital circuit designs
Publication Date: 2025.12.23 SYNOPSYS INC
  • US12505271B2 patent drawing
  • US12505271B2 patent drawing
  • US12505271B2 patent drawing

AI summary

A method includes: receiving a circuit design including circuit stages; deriving initial logic conditions for nets in a fanout cone from an input port in accordance with a primordial event; initializing a priority queue of logic transition events with the primordial event; determining a trigger event from the priority queue, the trigger event having a timestamp equal to or earlier than all others in the priority queue and representing a logic transition at an input pin of a current circuit stage; simulating an arc of the circuit design from the input pin of the current circuit stage to an input pin of a fanout circuit stage to generate a propagated event; computing a propagated event timestamp based on: the trigger event timestamp; and a delay associated with the arc; enqueuing the propagated event on the priority queue; and generating a static analysis report based on the propagated event timestamp.