Exposed-Fin Semiconductor Structure for Leakage Current Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor device fabrication methods, such as Fin FETs, face challenges with short-channel effects and leakage currents due to weak gate control over fins, especially at the bottom, and the high cost and complexity of SOI substrate preparation.
Innovation Solution
A semiconductor device fabrication method involving the formation of initial fins with a sacrificial material layer and a first material layer on a substrate, followed by the creation of trenches and sacrificial fin layers, and the removal of these layers to form fin openings, allowing for the formation of an isolation structure on the substrate, which improves control over channel current and reduces leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Fin FET structure is used to overcome short-channel effects, then gate control ability is improved, but leakage current of off state is difficult to control due to weak control over fins covered by isolation structure
Solution Approach 1:
The patent removes the isolation layer completely to expose the bottom of fins, eliminating the region where gate control is weak. This extraction of the problematic isolation structure allows the gate to directly control the entire fin surface including the bottom, thereby reducing off-state leakage current while maintaining good gate control ability.
Solution Approach 2:
The patent transitions from a planar device structure to a three-dimensional Fin FET structure with exposed fin bottoms. By changing the geometric configuration to expose the previously covered fin surfaces, the gate achieves enhanced control in the vertical dimension, improving both reliability and reducing leakage simultaneously.
2Object-generated harmful factors
If SOI technology is used to reduce leakage current, then off state leakage is reduced, but fabrication complexity and cost increase
Solution Approach 1:
The patent uses a sacrificial material layer that is temporarily introduced during fabrication and then completely removed. This disposable sacrificial layer enables the formation of exposed fin structures without requiring complex SOI substrate preparation, reducing fabrication complexity and cost while achieving the desired leakage reduction.
Solution Approach 2:
The sacrificial material layer is formed in advance before fin formation, serving as a template and support structure during fabrication. This preliminary action simplifies the manufacturing process by providing a straightforward method to create exposed fin structures without the need for complex SOI technology.
3Ease of manufacture
If conventional planar device structure is used, then fabrication is simple, but channel current control is weak resulting in short-channel effects
Solution Approach 1:
The patent maintains fabrication simplicity by using conventional planar processing steps but achieves improved channel current control by transitioning to a three-dimensional Fin FET structure. The vertical fins provide enhanced gate control over the channel while the exposed bottom surfaces further improve control, all achieved through standard fabrication techniques.
Solution Approach 2:
The channel region is segmented into multiple vertical fins instead of a single planar channel. This segmentation increases the effective channel width and improves gate control capability while maintaining compatibility with simple conventional fabrication processes.
Data Source
AI summary
The present disclosure provides a semiconductor device. The semiconductor device includes a substrate, including a plurality of protrusions; a plurality of fins formed over the substrate and aligned with the plurality of protrusions; and an isolation structure formed on the substrate and between the protrusions and the fins. An orthographic projection of each of the plurality of fins and an orthographic projection of a corresponding protrusion of the plurality of protrusions on the substrate coincide with each other.