Exposed Redistribution Layer for Semiconductor Package Testing

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Solution Overview

Problem

Current semiconductor packaging techniques face challenges in cost-effectively testing and mitigating defects, particularly due to high-temperature processes that can damage electrical components and alter circuit characteristics, making it difficult to access and test the redistribution layer during packaging.

Innovation Solution

The implementation of semiconductor packages with exposed portions of the redistribution layer, allowing for electrical contact with testing probes, which includes forming dielectric layers with openings to expose bond pads and terminals, enabling testing and reprogramming after high-temperature processing steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the redistribution layer is fully encapsulated during packaging, then the package structure is complete and protected, but testing and detection of electrical components become inaccessible

Engineering Contradiction:

Improvepackage structure integrityVSAvoidaccess to redistribution layer for testing

Core Design Contradiction:

ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The packaging structure is segmented into multiple layers with strategic openings. The redistribution layer is divided into encapsulated portions (for structural integrity) and exposed portions (for testing access), allowing both protection and accessibility simultaneously through spatial segmentation of functions

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the packaging structure have different properties: some areas provide full encapsulation for protection, while specific local regions have openings to expose bond pads and terminals for testing. This local differentiation allows the structure to simultaneously achieve both structural integrity and test accessibility

Inventive Principle:

Principle #3Local quality

2Ease of manufacture

If high-temperature packaging processes are used, then the package is fully formed and sealed, but electrical components and circuit characteristics may be damaged or altered

Engineering Contradiction:

Improvepackaging process completionVSAvoidelectrical component integrity

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

Testing and detection are performed at intermediate stages before the final high-temperature encapsulation is complete. This preliminary testing allows detection of defects early when mitigation is still possible, before the component undergoes damaging high-temperature processing

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The packaging process incorporates intermediate testing steps that provide feedback on electrical component status. This feedback mechanism allows for detection and potential mitigation of defects before final encapsulation, enabling process adjustment to prevent damage from high-temperature steps

Inventive Principle:

Principle #23Feedback

3Reliability

If all portions of the redistribution layer are enclosed, then the package is fully sealed and protected, but cost-effective testing and defect mitigation become difficult

Engineering Contradiction:

Improvepackage sealing and protectionVSAvoidtesting and defect mitigation capability

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The redistribution layer access is segmented into multiple strategic openings distributed across the package structure. These openings provide access to different test points and circuit regions, enabling comprehensive testing while maintaining overall package sealing and protection in non-critical areas

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The exposed portions of the redistribution layer serve multiple functions: they provide testing access, enable defect detection, allow for process verification, and support quality control. This multi-functionality achieves comprehensive manufacturing capability without requiring complete exposure of the entire redistribution layer

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS11600523B2Semiconductor package having exposed redistribution layer features and related methods of packaging and testing

Publication Date: 2023.03.07 MICROCHIP TECHNOLOGY INC

AI summary

A method of packaging a semiconductor device having a bond pad on a surface thereof includes forming a redistribution material electrically coupled to the bond pad, forming a dielectric material over the redistribution material, and removing a first portion of the dielectric material to expose a first portion of the redistribution material. Semiconductor packages may include a redistribution layer having a first portion adjacent and coupled to a first contact of the package, a second portion exposed by a first opening in a dielectric material, and a redistribution line electrically coupled to a first bond pad, the first portion, and the second portion. Such a package may be tested placing at least one probe needle in contact with at least one terminal of the package, providing a test signal from the probe needle to the package through the terminal, and detecting signals using the needle.