Extended-Drain MOSFET Stepped Buffer Dielectric Layer
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Solution Overview
Problem
Extended-drain metal-oxide-semiconductor devices are susceptible to damage from hot-carrier injection due to elevated drain voltages, which degrades the linear drain current and restricts their use in high-voltage applications such as automotive systems.
Innovation Solution
A structure for an extended-drain metal-oxide-semiconductor device is created with a buffer dielectric layer having different thickness portions, where a thicker portion is positioned between the substrate and the gate electrode, and a thinner portion is adjacent to the gate electrode's sidewall, reducing the drain voltage and susceptibility to hot-carrier injection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If elevated drain voltages are used to enhance voltage handling capability, then the device can handle higher voltages, but the device becomes highly susceptible to damage from hot-carrier injection
Solution Approach 1:
The buffer dielectric layer is configured with non-uniform thickness, having a first thickness in a first region and a second thickness in a second region. This local variation in dielectric thickness creates different electrical field distributions in different regions, allowing the device to handle high voltages while protecting against hot-carrier injection damage in specific critical areas.
Solution Approach 2:
The buffer dielectric layer acts as an intermediary structure between the substrate and the extended drain region. This intermediate layer modifies the electrical field distribution, serving as a protective barrier that reduces hot-carrier injection damage while maintaining the high voltage handling capability of the extended drain structure.
2Ease of manufacture
If a uniform thickness buffer dielectric layer is used, then the manufacturing process is simpler, but the device cannot effectively reduce hot-carrier injection damage in critical regions
Solution Approach 1:
The buffer dielectric layer implements local quality by having different thicknesses in different regions. The first region has a first thickness optimized for one function, while the second region has a second thickness optimized for another function, allowing tailored protection against hot-carrier injection where most needed while maintaining manufacturing feasibility.
Solution Approach 2:
The buffer dielectric layer is segmented into multiple thickness regions rather than being uniform. This segmentation allows different portions of the layer to perform different functions - one portion providing enhanced protection against hot-carrier injection while another portion maintains standard electrical characteristics, resolving the conflict between manufacturing simplicity and protective effectiveness.
Data Source
AI summary
Structures for an extended-drain metal-oxide-semiconductor device and methods of forming a structure for an extended-drain metal-oxide-semiconductor device. First and second source/drain regions are formed in a substrate, and a gate electrode is formed over the substrate. The gate electrode has a sidewall, and the gate electrode is laterally positioned between the first source/drain region and the second source/drain region. A buffer dielectric layer is formed that includes a first dielectric layer having a first portion positioned between the substrate and the gate electrode. The dielectric layer also has a second portion positioned on the substrate laterally between the sidewall of the gate electrode and the first source/drain region. The first portion of the dielectric layer has a first thickness, and the second portion of the first dielectric layer has a second thickness that is less than the first thickness.