Extended I/O Pad IC Package for High Power

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Solution Overview

Problem

Conventional flip-chip mounting techniques are inadequate for power IC devices due to size constraints, heat dissipation challenges, and limited current carrying capacity of solder bumps, which restrict their use in high-power and high-speed applications.

Innovation Solution

The development of extended I/O pads that extend to the peripheral side edges of the IC die, allowing for larger solder joint connections with substrates, including printed circuit boards, which form fillets of solder to enhance mechanical and electrical connectivity and heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional flip-chip mounting with solder bumps is used, then compact package size is achieved, but current carrying capacity and heat dissipation are insufficient for power IC devices

Engineering Contradiction:
Improvecurrent carrying capacityVSAvoidpackage structure
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The I/O pads are extended from the conventional confined area on the active surface to the peripheral side edges of the die, utilizing the vertical/dimensional space along the sides of the die. This dimensional extension allows solder joints to form fillets that extend outward from the peripheral side edges, effectively increasing the solder joint cross-sectional area and current carrying capacity without significantly increasing the overall package footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent applies different pad configurations to different locations on the die. I/O pads are selectively extended to peripheral side edges where high current carrying capacity is needed, while maintaining conventional configurations elsewhere. This local modification optimizes current distribution and heat dissipation at critical areas without unnecessarily complicating the entire package structure.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If I/O pads are extended to peripheral side edges, then solder joint area and heat dissipation are improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvesolder joint areaVSAvoidpad alignment
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The I/O pads are extended to the peripheral side edges during the die fabrication process, before mounting. This preliminary action ensures that the extended pad geometry is precisely formed with controlled dimensions and positions, reducing the alignment complexity during subsequent mounting operations. The extended pads create larger overlap areas with substrate contact pads, providing manufacturing tolerance compensation.

Inventive Principle:
Principle #10Preliminary action

3Strength

If larger solder joint connections are formed, then heat dissipation and mechanical strength are improved, but package size increases

Engineering Contradiction:
Improvemechanical connection strengthVSAvoidpackage volume
Core Design Contradiction:
StrengthVSVolume of moving object

Solution Approach 1:

The solder joints form fillets that extend outward from the peripheral side edges of the die in the vertical/dimensional direction rather than expanding the horizontal package footprint. This dimensional utilization allows larger solder joint cross-sectional areas and improved mechanical strength while maintaining compact package dimensions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables reliable high-current carrying capabilities while maintaining compact package sizes, improving heat dissipation and reducing the risk of solder bridging, thus addressing the limitations of conventional packaging methods for power IC devices.

Implementation Method 1

a plurality of solder joint connections that mechanically and electrically connect the bonds pads on the active surface of the die with associated contact pads on the substrate

Methodology Applied
Scientific EffectSoldering: Soldering

Data Source

PatentUS7456503B1Integrated circuit package
Publication Date: 2008.11.25 NAT SEMICON CORP
  • US7456503B1 patent drawing
  • US7456503B1 patent drawing
  • US7456503B1 patent drawing

AI summary

A semiconductor device, including methods and arrangements for making the same, are described. The device includes an integrated circuit die having a plurality of bond pads. At least one bond pad on the active surface of the die is an extended I/O pad. Each extended I/O pad extends to at least one peripheral side edge of the die. Solder fillets are formed between the extended I/O pads and corresponding contacts on a substrate.