External AXU Interface for Off-Chip Instruction Format Conversion
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Solution Overview
Problem
The development of application-specific programmable chips is hindered by the need for substantial upfront design, testing, and verification efforts, especially when integrating multiple functional units, and there are concerns regarding intellectual property integration and confidentiality among different entities.
Innovation Solution
An external Auxiliary Execution Unit (AXU) interface is introduced, allowing a processing core on one chip to communicate with an off-chip AXU, enabling independent design, testing, and verification of the AXU, while maintaining architectural consistency and supporting various hardware technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple functional units are integrated into a single programmable chip to provide application-specific functionality, then adaptability and versatility are improved, but device complexity and development costs increase due to substantial design, testing, and verification efforts
Solution Approach 1:
The patent segments the programmable chip into two separate chips: a first chip containing the processing core and a second chip containing the auxiliary execution unit (AXU). This segmentation allows each chip to be designed, tested, and verified independently, reducing overall design complexity while maintaining the ability to provide application-specific functionality through the AXU.
Solution Approach 2:
The patent extracts the auxiliary execution unit from the main processing core and places it on a separate chip. This extraction enables the AXU to be developed, tested, and verified independently, reducing the upfront design efforts required for integrating multiple functional units while still enabling application-specific optimizations.
2Adaptability or versatility
If multiple entities' proprietary designs are integrated on the same chip, then adaptability is improved, but intellectual property confidentiality concerns worsen
Solution Approach 1:
By segmenting different functional units onto separate chips, the patent allows each entity to maintain control over their proprietary design on their own chip. The processing core remains on the first chip while the AXU with proprietary functionality resides on the second chip, eliminating the need to disclose confidential designs while still enabling integration through standardized interfaces.
3Productivity
If a common processing core is reused with multiple AXU designs, then productivity is improved, but device complexity increases due to interface requirements
Solution Approach 1:
The patent implements a universal interface between the processing core and the AXU that allows a common processing core to work with multiple different AXU designs. This universal interface standardizes the interaction protocol, enabling a single processing core design to be reused across multiple applications with different AXU configurations, thereby improving development efficiency.
Data Source
AI summary
An external Auxiliary Execution Unit (AXU) interface is provided between a processing core disposed in a first programmable chip and an off-chip AXU disposed in a second programmable chip to integrate the AXU with an issue unit, a fixed point execution unit, and optionally other functional units in the processing core. The external AXU interface enables the issue unit to issue instructions to the AXU in much the same manner as the issue unit would be able to issue instructions to an AXU that was disposed on the same chip. By doing so, the AXU on the second programmable chip can be designed, tested and verified independent of the processing core on the first programmable chip, thereby enabling a common processing core, which has been designed, tested, and verified, to be used in connection with multiple different AXU designs.