External Circuit Structure Construction Using Electroless Plating
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Solution Overview
Problem
Current methods for constructing organic substrates with line widths below 50 μm face challenges in achieving high accuracy and low surface roughness due to limitations in existing materials and processes, leading to high costs and inefficiencies, especially with the use of high-cost materials like PCF and ABF.
Innovation Solution
A method involving the lamination of copper foils and prepregs onto an inner circuit substrate, where a desmearing process is implemented before corroding off the copper foils, allowing for electroless copper plating without desmearing, which enhances adhesion and surface roughness, using common copper foils and prepregs to reduce material costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching process is used to improve surface roughness, then surface roughness can be reduced, but the etching pits have big height difference ranging from several μm to even larger scope
Solution Approach 1:
The patent changes the chemical parameters of the etching solution by adding specific additives (such as surfactants or complexing agents) to modify the etching rate and uniformity. This controls the depth and height difference of etching pits, reducing surface roughness while maintaining uniform pit dimensions suitable for fine line circuits with line/space of 10-20 μm and higher frequency signals.
2Ease of manufacture
If subtractive process is used for circuits with line/space larger than 50 μm, then external circuit structure can be constructed, but the process is entirely not applicable for circuits below 50 μm as it cannot guarantee size accuracy
Solution Approach 1:
The patent segments the circuit construction process into two distinct stages: first constructing the external circuit structure using the subtractive process for the organic substrate layer, then forming the fine line circuits using the semi-additive process with electroless copper plating. This segmentation allows each process to operate within its optimal capability range, achieving both structural construction and fine line precision.
Solution Approach 2:
The patent performs preliminary actions by first constructing the external circuit structure and organizing the organic substrate before implementing the fine line circuit formation. This preliminary structuring provides a stable foundation that enables subsequent high-precision fine line patterning to achieve the required size accuracy for circuits below 50 μm.
3Manufacturing precision
If additive process is used for circuits below 50 μm, then high accuracy can be achieved, but the electroless copper plating is too slow
Solution Approach 1:
The patent changes the parameters of the electroless copper plating process by optimizing the plating solution composition, temperature, and activation treatment of the substrate surface. These parameter adjustments significantly increase the copper plating rate while maintaining uniform thickness and adhesion, thereby improving productivity without sacrificing the high accuracy required for fine line circuits below 50 μm.
4Quantity of substance
If common copper foils and prepregs are used instead of high-cost materials like PCF and ABF, then material costs are reduced, but achieving high accuracy and low surface roughness becomes challenging
Solution Approach 1:
The patent changes the surface treatment parameters by implementing a controlled etching process with specific solution compositions and processing conditions. This treatment modifies the surface morphology of common copper foils and prepregs to achieve low surface roughness and high accuracy, making these cost-effective materials suitable for fine line circuit substrates without requiring expensive specialized materials.
Solution Approach 2:
The patent creates a modified surface structure on common copper foils and prepregs through etching that replicates the functional characteristics of high-cost materials like PCF and ABF. By copying the essential surface properties needed for high accuracy and low roughness, the patent enables the use of cheaper materials while maintaining the required performance level.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces material costs by half compared to using PCF and one-third compared to ABF, while maintaining high accuracy and low surface roughness, making it more cost-effective and efficient for producing fine line circuit substrates.
Implementation Method 1
corroding off the copper foil
Implementation Method 2
electroless copper plating on the prepreg to form an electroless plating copper layer
Data Source
AI summary
A method for constructing an external circuit structure is provided. The method is applied to an inner circuit substrate, wherein, the method comprises: laminating a copper foil and a prepreg on the inner circuit substrate; wherein, the prepreg is laminated between the copper foil and the inner circuit substrate; drilling at least one blind via from the copper foil to reach the copper circuit of the inner circuit substrate; removing smear generated in the at least one blind via during the drilling process; corroding off the copper foil; electroless copper plating on the prepreg to form an electroless plating copper layer on the prepreg; wherein, during the electroless copper plating process, a swelling process without desmearing process is implemented.