Identifying Failing Memory Blocks in Multi-Plane Storage

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Solution Overview

Problem

Existing memory devices face inefficiencies in managing failing memory cells during multi-plane storage operations, where all accessed blocks are retired even if only a subset or a single block is non-functional, leading to resource wastage and inefficient memory pool management.

Innovation Solution

Implementing a system that applies single-plane storage operations to identify and retire only the failing blocks within a multi-plane storage operation, using Error Correcting Code (ECC) decoding and single-plane programming/erasure tests to pinpoint bad blocks or sections, especially in 3D devices where only specific sections may be faulty.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all blocks accessed in a multi-plane storage operation are retired when a failure is detected, then reliability is improved by ensuring failing blocks are removed, but productivity deteriorates due to resource wastage and inefficient memory pool management

Engineering Contradiction:
Improvememory reliabilityVSAvoidstorage efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the failure identification process by applying single-plane storage operations to individually test each block accessed during the multi-plane operation. This allows isolation of the actual failing block(s) from functional blocks, enabling selective retirement rather than blanket retirement of all accessed blocks. The segmentation principle directly resolves the contradiction by improving reliability through accurate failure identification while maintaining productivity by preserving usable memory resources.

Inventive Principle:
Principle #1Segmentation

2Productivity

If single-plane storage operations are applied to identify failing blocks, then storage efficiency is improved by maintaining a healthy pool of usable memory cells, but device complexity increases due to additional testing operations

Engineering Contradiction:
Improvestorage efficiencyVSAvoidoperation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing single-plane storage operations as a follow-up testing step after detecting a multi-plane operation failure. These preliminary tests on individual blocks identify the actual failing blocks before final retirement decisions are made. This approach improves storage efficiency by avoiding premature retirement of functional blocks, while the complexity is managed by executing tests only when multi-plane failures occur, not during every normal operation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10248515B2Identifying a failing group of memory cells in a multi-plane storage operation
Publication Date: 2019.04.02 APPLE INC
  • US10248515B2 patent drawing
  • US10248515B2 patent drawing
  • US10248515B2 patent drawing

AI summary

An apparatus includes an interface and storage circuitry. The interface is configured to communicate with a memory that includes multiple memory cells arranged in multiple planes that each includes one or more blocks of the memory cells. The storage circuitry is configured to apply a multi-plane storage operation to multiple blocks simultaneously across the respective planes. In response to detecting that the multi-plane storage operation has failed, the storage circuitry is configured to apply a single-plane storage operation to one or more of the blocks that were accessed in the multi-plane storage operation, including a given block, and to identify the given block as a bad block if the single-plane operation applied to the given block fails. The storage circuitry is further configured to store data in the blocks that were accessed in the multi-plane operation but were not identified as bad blocks.