Fail-Safe Level Shifter for Low-Supply Drop Protection

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Solution Overview

Problem

Existing IC level shifters lack a fail-safe mechanism to prevent unintentional or false level shifting when the low voltage supply level drops below a threshold, leading to incorrect logic levels and potential errors in on-chip circuitry operations.

Innovation Solution

The proposed IC device incorporates a level shifter with a fail-safe mechanism, featuring first and second pull-down transistors that connect the input and output nodes to a reference voltage rail in response to a fail-safe signal generated when the low voltage supply level falls below a threshold, thereby preventing false level shifting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a level shifter translates signals from low voltage to high voltage domains, then compatibility between circuits operating at different voltage levels is achieved, but false level shifting occurs when the low voltage supply level drops below a threshold

Engineering Contradiction:
Improvevoltage domain compatibilityVSAvoidlevel shifting accuracy
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The fail-safe circuit performs preliminary detection of the low voltage supply level before false level shifting can occur. When the supply level drops below a threshold, the circuit proactively activates the pull-down transistors to force the input and output nodes to a known reference voltage state, preventing the propagation of incorrect logic levels to the high voltage domain.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fail-safe circuit acts as an intermediary between the low voltage supply and the level shifter core. It monitors the supply voltage and intervenes by activating pull-down transistors that force the input and output nodes to a reference voltage, thereby mediating the protection against false level shifting while allowing normal operation when supply levels are adequate.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the low voltage supply level drops below threshold without detection, then incorrect logic levels are generated, but adding a fail-safe mechanism increases circuit complexity

Engineering Contradiction:
Improvelogic level accuracyVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The fail-safe circuit is self-regulating and automatically detects when the low voltage supply level drops below the threshold without requiring external control. The circuit monitors its own supply conditions and autonomously activates the pull-down transistors to prevent false level shifting, eliminating the need for additional control logic or external monitoring systems.

Inventive Principle:
Principle #25Self-service

3Reliability

If false level shifting occurs due to undetected supply voltage drops, then errors propagate in on-chip circuitry operations, but implementing fail-safe detection adds overhead to the level shifter design

Engineering Contradiction:
Improveerror preventionVSAvoiddesign overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The fail-safe circuit applies preliminary anti-action by detecting supply voltage drops before they can cause false level shifting. The pull-down transistors are activated in advance to force the input and output nodes to a known reference voltage state, counteracting the potential harmful effect of voltage drops before they propagate errors to the high voltage domain.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS12294365B2Integrated circuit (IC) including a level shifter having fail-safe implementation
Publication Date: 2025.05.06 TEXAS INSTRUMENTS INC
  • US12294365B2 patent drawing
  • US12294365B2 patent drawing
  • US12294365B2 patent drawing

AI summary

An IC including a level shifter core circuit configured to receive an input signal at an input node from a low-voltage circuit portion configured to operate with a low voltage supply level, and to translate the input signal to an output signal at an output node, the output signal having a maximum voltage greater than the low voltage supply level; and a fail-safe circuit including first and second pull-down transistors configured to respectively connect the input node and the output node to a reference voltage rail in the event that the low voltage supply level drops below a threshold level. The fail-safe circuit may also include a supply cutoff switch configured to effectuate a gated connection to the low voltage supply level in response to detecting that it is below the threshold level.