Multi Fan-Out Package Structure with Overlapping Conductive Lines

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Solution Overview

Problem

Existing package structures and methods for semiconductor devices are not entirely satisfactory in terms of integration and reliability, particularly in 3D packaging and multi-chip modules, where alignment and signal transfer issues lead to inefficiencies and increased costs.

Innovation Solution

A package structure and method involving a multi-chip module with a semiconductor die and die stacks integrated over a fan-out redistribution structure, using multiple masks for precise exposure and development processes to form overlapping conductive lines, which enhances alignment and reduces insertion loss by eliminating through-substrate vias and interposer substrates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If through-substrate vias and interposer substrates are used in existing package structures, then electrical connections can be established, but alignment precision deteriorates and insertion loss increases

Engineering Contradiction:
Improvesignal transfer reliabilityVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent removes through-substrate vias and interposer substrates from the package structure, eliminating the sources of alignment errors and signal loss. The fan-out redistribution structure directly connects die pads to package substrate pads without intermediate connection elements, achieving both improved alignment precision and reduced insertion loss.

Inventive Principle:
Principle #2Taking out (Extraction)

2Manufacturing precision

If multiple masks are used for exposure and development processes, then manufacturing complexity increases, but manufacturing precision improves

Engineering Contradiction:
Improvealignment precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent employs multiple mask exposure and development processes as preliminary actions to pre-establish precise alignment relationships in the fan-out redistribution structure. The overlapping conductive lines are formed through sequential mask applications, ensuring accurate signal transfer paths are created before die bonding occurs.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If fan-out redistribution structure with overlapping conductive lines is implemented, then signal transfer accuracy improves, but device complexity increases

Engineering Contradiction:
Improvesignal transfer accuracyVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple conductive lines into overlapping configurations within the fan-out redistribution structure. This merging approach creates redundant signal paths that improve transfer accuracy while consolidating the overall structure, as the overlapping lines share common substrates and connection points rather than requiring separate independent pathways.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11107801B2Multi fan-out package structure and method for forming the same
Publication Date: 2021.08.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11107801B2 patent drawing
  • US11107801B2 patent drawing
  • US11107801B2 patent drawing

AI summary

A package structure and method for forming the same are provided. The package structure includes a first redistribution structure formed over a substrate, and the first redistribution structure includes a first conductive line, a second conductive line and a first overlapping conductive line between the first conductive line and the second conductive line. The first conductive line has a first width, the second conductive line which is parallel to the first conductive line has a second width, and the overlapping conductive line has a third width which is greater than the first width and the second width. The package structure includes a first package unit formed over the first redistribution structure, and the first package unit includes a first semiconductor die and a first die stack, and the first semiconductor die has a different function than the first die stack.