Fan-Out Semiconductor Package Via Interconnect

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Solution Overview

Problem

Current fan-out semiconductor packages face challenges in achieving thinness and reliability due to the limitations of interposer substrates and signal path length, which affect their ability to handle multiple stacked memory chips and maintain efficient signal transmission.

Innovation Solution

A fan-out semiconductor package design that stacks multiple semiconductor chips with vias connecting redistribution layers, using a metal post and via conductor structure to stabilize electrical connections and reduce signal path length, eliminating the need for interposer substrates and enhancing reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If interposer substrates are used to connect stacked memory chips, then electrical connections between chips are established, but the overall package thickness increases and signal transmission efficiency decreases

Engineering Contradiction:

Improveelectrical connection reliabilityVSAvoidpackage thickness

Core Design Contradiction:

ReliabilityVSLength of moving object

Solution Approach 1:

The patent extracts and eliminates the interposer substrate from the stacked chip structure. Instead of using a separate interposer substrate to facilitate electrical connections, the invention directly connects upper and lower memory chips through vias formed in the encapsulant material, thereby removing the thickness contribution of the interposer while maintaining reliable electrical connections.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces the encapsulant material as a new intermediary medium that serves dual functions: it provides mechanical support and protection for the stacked chips while simultaneously serving as the medium through which vias are formed to establish electrical connections. This replaces the traditional interposer substrate's connection function while reducing overall thickness.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If interposer substrates are used to connect stacked memory chips, then electrical connections are established, but signal path length increases causing signal loss

Engineering Contradiction:

Improveelectrical connection reliabilityVSAvoidsignal loss

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

By removing the interposer substrate from the signal path, the patent directly connects the memory chips through shorter via paths in the encapsulant. This extraction of the interposer eliminates the additional signal transmission distance that would otherwise exist through the interposer's conductive traces, thereby reducing signal loss and energy dissipation.

Inventive Principle:

Principle #2Taking out (Extraction)

3Adaptability or versatility

If multiple semiconductor chips are stacked to increase functionality, then multi-functionality is achieved, but package thickness increases

Engineering Contradiction:

Improvemulti-functionalityVSAvoidpackage thickness

Core Design Contradiction:

Adaptability or versatilityVSLength of moving object

Solution Approach 1:

The patent utilizes the encapsulant material as a thin-film-like medium that provides mechanical support and protection while allowing for compact via formation. This encapsulant structure enables efficient space utilization in the vertical stacking direction, supporting multi-chip integration without proportionally increasing package thickness compared to rigid interposer-based approaches.

Inventive Principle:

Principle #30Flexible shells and thin films

4Ease of manufacture

If conventional packaging methods are used, then manufacturing simplicity is maintained, but signal transmission efficiency and reliability are compromised

Engineering Contradiction:

Improvemanufacturing simplicityVSAvoidsignal transmission efficiency

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent makes the encapsulant material perform multiple functions simultaneously: it provides mechanical protection and support for the stacked chips, serves as the medium for forming connection vias, and acts as an insulating layer. This multi-functional approach integrates what were previously separate functions (protection + connection facilitation), simplifying the overall structure while improving signal transmission by eliminating the interposer substrate.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS10347585B2Fan-out semiconductor package

Publication Date: 2019.07.09 SAMSUNG ELECTRONICS CO LTD

AI summary

A fan-out semiconductor package includes: a first semiconductor chip having a first active surface having first connection pads; a first encapsulant encapsulating the first semiconductor chip; a first connection member disposed on the first active surface and including a first redistribution layer electrically connected to the first connection pads; a second semiconductor chip having a second active surface having second connection pads; a second encapsulant covering the first connection member and encapsulating the second semiconductor chip; a second connection member disposed on the second active surface and including a second redistribution layer electrically connected to the second connection pads; and a third via penetrating through the second encapsulant, connecting the first redistribution layer and the second redistribution layer to each other, and including a metal post connected to the first redistribution layer and a via conductor disposed on the metal post and connected to the second redistribution layer.