Fan-Out Package Embedded Heat Dissipation Layer
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Solution Overview
Problem
Existing fan-in semiconductor packages face challenges in heat dissipation and yield due to the formation of heat dissipation members on already manufactured packages, leading to inefficient heat transfer and increased manufacturing complexity, which results in decreased semiconductor chip yield and limited thermal conductivity.
Innovation Solution
A fan-out semiconductor package design that embeds a heat dissipation layer with excellent thermal conductivity, such as copper, within the encapsulant, allowing for effective heat transfer and reducing the distance between the semiconductor chip and the heat dissipation layer, while also using a resin layer to selectively introduce only effective heat dissipation layers and reduce manufacturing costs and complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If heat dissipation members are formed on already manufactured packages, then heat dissipation is achieved, but manufacturing complexity increases and semiconductor chip yield decreases
Solution Approach 1:
The heat dissipation layer is embedded within the encapsulant material before the semiconductor chip is mounted on the package substrate. This preliminary action allows the heat dissipation structure to be prepared in advance, simplifying the overall manufacturing process and avoiding complex post-assembly operations that would reduce yield.
Solution Approach 2:
The heat dissipation layer is integrated into the encapsulant material, merging two previously separate components (heat dissipation layer and encapsulant) into a single unified structure. This integration reduces manufacturing complexity by eliminating separate assembly steps while maintaining effective heat dissipation functionality.
2Temperature
If heat dissipation members are formed on already manufactured packages, then heat dissipation is achieved, but semiconductor chip yield decreases
Solution Approach 1:
The heat dissipation layer is prepared and positioned within the encapsulant before chip mounting, allowing quality verification and defect detection to occur earlier in the manufacturing process. This preliminary preparation prevents yield loss by identifying issues before the chip is permanently attached.
Solution Approach 2:
Integrating the heat dissipation layer into the encapsulant creates a unified component that reduces the number of separate assembly operations. Fewer assembly steps mean fewer opportunities for defects and lower risk of chip damage, thereby maintaining higher semiconductor chip yield.
3Loss of energy
If the distance between semiconductor chip and heat dissipation layer is reduced, then heat transfer efficiency improves, but manufacturing precision requirements increase
Solution Approach 1:
By merging the heat dissipation layer with the encapsulant material, the structure naturally achieves close proximity between the chip and heat dissipation surfaces. The encapsulant material itself fills the space, eliminating the need for high-precision positioning operations while ensuring efficient thermal contact.
Solution Approach 2:
The encapsulant material serves as an intermediary that simultaneously provides structural support, electrical insulation, and thermal conduction pathways. This intermediary approach allows the heat dissipation layer to be positioned close to the chip without requiring ultra-precise positioning, as the encapsulant material accommodates minor variations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The fan-out semiconductor package achieves enhanced heat dissipation characteristics and suppresses the decrease in semiconductor chip yield, providing improved thermal conductivity and structural stability, while being more cost-effective and efficient in manufacturing.
Implementation Method 1
a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed
Data Source
AI summary
A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.