Fan-out semiconductor package with stepped chip side
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Solution Overview
Problem
Fan-out semiconductor packages face challenges in achieving strong adhesion between the semiconductor chip and the encapsulant, leading to potential delamination issues under thermal cycles or drops, which affects the reliability of the package.
Innovation Solution
The introduction of a first interconnection member with a through-hole, where the semiconductor chip is disposed and encapsulated by the encapsulant, which fills the spaces between the hole walls and the chip's side surfaces, creating a step portion on the chip's side surface to enhance anchoring and structural stability, thereby improving adhesion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the semiconductor chip is directly encapsulated without additional structural modifications, then the manufacturing process is simple, but the adhesion between the chip and encapsulant is insufficient leading to delamination under thermal cycles or drops
Solution Approach 1:
The semiconductor chip side surface is segmented into multiple levels through step portions, creating distinct adhesion zones. This segmentation increases the total bonded area between the chip and encapsulant, preventing delamination under thermal cycles or mechanical shocks while maintaining manufacturing feasibility
Solution Approach 2:
The invention transitions from a flat two-dimensional bonding interface to a three-dimensional stepped structure. By creating multiple elevation levels on the chip side surface, the encapsulant can form adhesives bonds at multiple heights, significantly increasing the effective bonding area without substantially increasing the chip footprint
2Volume of moving object
If the chip size is reduced to meet compact package demands, then the package size decreases, but the structural stability and resistance to warpage deteriorate
Solution Approach 1:
Step portions are formed on the chip side surface before the encapsulation process. This preliminary structural preparation creates built-in anchoring points that prevent warpage and enhance structural stability during subsequent packaging and thermal cycling, eliminating the need for larger chip dimensions
Solution Approach 2:
The combination of the stepped chip structure with the encapsulant material creates a composite system where the encapsulant fills the step portions and forms mechanical interlocks. This composite structure provides enhanced rigidity and warpage resistance in compact packages without requiring increased chip size
Data Source
AI summary
A fan-out semiconductor package includes: a first interconnection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant filling at least portions of spaces between walls of the through-hole and side surfaces of the semiconductor chip; and a second interconnection member disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pads of the semiconductor chip through vias, wherein the side surface of the semiconductor chip has a step portion.