Far BEOL LC Filter Integration for High Density
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Solution Overview
Problem
Current wafer-level LC filter devices have low density capacitance and inductance, making them unsuitable for low frequency applications such as power management in mobile devices, and discrete inductors and capacitors are bulky and expensive.
Innovation Solution
The integration of an inductor and capacitor in the far BEOL layer with a high dielectric constant material and a metal fill layer to achieve high capacitance and inductance density, enabling a compact and cost-effective solution for low frequency applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If discrete inductors and capacitors are used, then higher capacitance and inductance values are achieved, but the device becomes bulky and expensive
Solution Approach 1:
The patent merges the inductor and capacitor into a single integrated LC filter device fabricated on the same semiconductor chip using standard CMOS processes. This integration combines previously discrete components into one compact unit, achieving high capacitance and inductance values without increasing device size, thereby resolving the contradiction between component values and device bulkiness
Solution Approach 2:
The patent utilizes the third dimension by fabricating the LC filter in the far BEOL layers (metal layers 6-12) of a 12-metal-layer CMOS process. By moving components vertically to upper metal layers, the design achieves high inductance and capacitance densities without increasing the chip footprint, effectively resolving the size-value contradiction
2Quantity of substance
If discrete inductors and capacitors are used, then higher capacitance and inductance values are achieved, but the device becomes expensive
Solution Approach 1:
The patent combines the LC filter with the CMOS logic circuit on the same chip, eliminating the need for separate discrete components and their associated packaging, mounting, and interconnection costs. This integration significantly reduces manufacturing complexity and cost while maintaining high capacitance and inductance values
Solution Approach 2:
The patent uses the existing CMOS fabrication infrastructure and standard process materials (copper or aluminum metal layers, silicon dioxide or silicon nitride dielectrics) to create the LC filter components. This self-service approach leverages the manufacturer's existing capabilities, avoiding the need for specialized processes or equipment, thereby reducing manufacturing costs
3Device complexity
If wafer level LC filter devices are used, then integration is achieved, but capacitance and inductance density remain low
Solution Approach 1:
The patent changes the physical parameters of the capacitor by using high dielectric constant materials (such as barium strontium titanate or lead zirconate titanate) in the capacitor dielectric layer. This parameter change increases the capacitance density without increasing device area, resolving the contradiction between integration and capacitance density
Solution Approach 2:
The patent employs composite structures for the inductor, combining metal traces with magnetic materials (such as ferrite or nickel-iron alloys) to enhance inductance density. This composite approach achieves high inductance values in a compact integrated format, resolving the contradiction between integration and inductance density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides an inductor capacitor filter with a high capacitance density of at least 100 nF/mm2 and inductance density of at least 100 nH/mm2, suitable for low frequency applications including power management in mobile devices.
Implementation Method 1
a capacitor adjacent to and electrically coupled to the inductor. The capacitor comprises a first electrode layer arranged over sidewalls and a bottom surface of a via opening in a first insulating layer, a dielectric layer over the first electrode layer, a second electrode layer over the dielectric layer
Implementation Method 2
a dielectric layer over the first electrode layer
Implementation Method 3
an inductor in a far BEOL layer
Implementation Method 4
The inductor capacitor filter may be used as a low pass filter with a node of the capacitor connected to the ground terminal or as a high pass filter with a node of the inductor connected to the ground terminal
Implementation Method 5
The LC filter may be used as a low pass filter with a node of the capacitor connected to the ground terminal or as a high pass filter with a node of the inductor connected to the ground terminal. The term 'low pass filter' may refer to a filter that allows signals with a frequency lower than a cut off frequency to pass. The term 'high pass filter' may refer to a filter that allows signals with a frequency higher than a cut off frequency to pass
Data Source
AI summary
A semiconductor device is provided. The semiconductor device comprises an inductor in a far back end of line layer and a capacitor adjacent to and electrically coupled with the inductor. The capacitor comprises a first electrode layer arranged over sidewalls and a bottom surface of a via in a first insulating layer A dielectric layer is provided over the first electrode layer. A second electrode layer is provided over the dielectric layer and a metal fill layer is provided over the second electrode layer. The metal fill layer has a top surface at least level with a top surface of the first insulating layer.