Fast-Feedback DLDO Circuit for Stable Low-Headroom FRAM Power
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Solution Overview
Problem
Ferroelectric RAM (FRAM) circuits face challenges in voltage regulation due to small differences between supply and load voltages, leading to instability and inefficiency in power management, particularly in power-limited applications where traditional low-dropout regulators (LDOs) fail to provide stable power supply with high bandwidth and low quiescent current.
Innovation Solution
A digital low-dropout regulator (DLDO) with fast feedback and optimized frequency response is designed, incorporating a first circuit path with a transistor and a second feedback path with an error amplifier, along with resistors and complementary transistors to regulate input voltage to output voltage, ensuring stable power supply and high-speed feedback, while minimizing output ripple and die size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional low-dropout regulator (LDO) is used to regulate voltage in FRAM circuits, then voltage stability can be maintained, but the regulator fails to provide high bandwidth and suffers from high quiescent current consumption
Solution Approach 1:
The LDO regulator is divided into two separate circuit paths: an analog path for voltage regulation and a digital feedback path for error detection. This segmentation allows the analog path to maintain voltage stability with low quiescent current, while the digital path provides high-bandwidth feedback control without adding significant power consumption.
Solution Approach 2:
The patent replaces the traditional analog feedback mechanism with a digital feedback system using an error amplifier and digital logic circuits. This substitution enables high bandwidth operation and reduces quiescent current by using digital switching instead of continuous analog signal processing.
2Loss of energy
If the difference between supply voltage and load voltage is reduced to achieve lower power consumption, then power efficiency improves, but the transistor becomes ohmic and loses voltage regulation capability
Solution Approach 1:
The patent implements a digital feedback loop that continuously monitors the output voltage and adjusts the pass transistor gate voltage accordingly. This feedback mechanism allows the regulator to maintain proper voltage regulation even when operating with a very small voltage difference between input and output, preventing the transistor from entering the ohmic region.
Solution Approach 2:
The regulator uses dynamic control of the pass transistor through digital switching and adaptive biasing. The error amplifier dynamically adjusts the control signal based on load conditions, allowing the transistor to operate in the saturation region even when the voltage headroom is minimal, thus maintaining regulation capability while enabling low-power operation.
3Speed
If a fast feedback path is added to improve transient response speed, then bandwidth increases, but circuit complexity and die size increase
Solution Approach 1:
The patent merges the error detection and feedback control functions into a single integrated digital logic unit. The error amplifier output directly controls digital switches that modulate the pass transistor, combining multiple functions into a compact architecture that achieves fast transient response without proportionally increasing complexity.
Solution Approach 2:
The patent uses a simplified digital model of the error signal to control the feedback mechanism. Instead of using a complex continuous analog feedback path, the system uses digital sampling and switching based on the error state, reducing the complexity of the feedback path while maintaining fast response characteristics.
Data Source
AI summary
Embodiments relate to digital low-dropout (DLDO) with fast feedback and optimized frequency response. Certain embodiments may relate more particularly to ferroelectric memory circuit configurations. For example, a low dropout regulator may include a first circuit path configured to regulate an input voltage to an output voltage at a load, wherein the first path comprises a first transistor. The apparatus may also include a second circuit path configured to feed back an error signal based on the input voltage and the output voltage, wherein the second circuit path comprises an error amplifier.


