Fast Recovery Rectifier Doping Strategy
Solution Overview
Problem
Conventional power semiconductor devices face challenges in reducing reverse recovery time (TRR) due to increased contact resistance from low impurity doping, which affects switching performance, especially at high operating voltages.
Innovation Solution
A rectifier design incorporating a N-type epitaxial layer with P-type and N-type diffusion regions forming bipolar transistors, where the P-type diffusion regions are electronically coupled to the N-type diffusion regions through a cover layer, reducing residue hold charge and minimizing reverse recovery time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If low doped N-type or P-type impurity semiconductor devices are used to reduce reverse recovery time, then reverse recovery time is reduced, but contact resistance significantly increases
Solution Approach 1:
The patent applies local quality by creating different doping concentrations in different regions of the semiconductor device. Specifically, it uses a multi-layer structure with varying impurity concentrations: a first doped region with lower impurity concentration to reduce reverse recovery time, and a second doped region with higher impurity concentration to reduce contact resistance. This spatial variation in doping quality allows each region to optimize for its specific function.
Solution Approach 2:
The patent segments the semiconductor device into multiple functional regions with different doping characteristics. The device is divided into a first doped region and a second doped region, each with distinct impurity concentrations optimized for different purposes. This segmentation allows the device to simultaneously achieve fast reverse recovery and low contact resistance by assigning different doping strategies to different segments.
2Reliability
If high concentration of N-type or P-type impurity is used, then contact resistance is reduced, but reverse recovery time increases
Solution Approach 1:
The patent applies local quality by creating different doping concentrations in different regions of the semiconductor device. Specifically, it uses a multi-layer structure with varying impurity concentrations: a first doped region with lower impurity concentration to reduce reverse recovery time, and a second doped region with higher impurity concentration to reduce contact resistance. This spatial variation in doping quality allows each region to optimize for its specific function.
Solution Approach 2:
The patent segments the semiconductor device into multiple functional regions with different doping characteristics. The device is divided into a first doped region and a second doped region, each with distinct impurity concentrations optimized for different purposes. This segmentation allows the device to simultaneously achieve fast reverse recovery and low contact resistance by assigning different doping strategies to different segments.
3Ease of manufacture
If conventional rectifier design is used, then manufacturing is simple, but reverse recovery time increases seriously at high operating voltage
Solution Approach 1:
The patent applies parameter changes by modifying the doping concentration parameters across different regions of the rectifier. It implements a graded doping profile where impurity concentration varies spatially - lower in the first doped region for fast reverse recovery and higher in the second doped region for low contact resistance. This parameter variation allows the rectifier to maintain simple manufacturing processes while achieving superior reverse recovery performance at high operating voltages.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The rectifier design effectively reduces reverse recovery time even at high operating voltages by eliminating hole charge in the N-type epitaxial layer, improving switching speed and performance.
Implementation Method 1
each of the P-type diffusion regions and the corresponding N-type diffusion region forms a bipolar transistor
Implementation Method 2
when the rectifier is in reverse biasing, there is no residue hold charge in silicon of the rectifier
Data Source
AI summary
The present disclosure provides a rectifier. The rectifier includes a N-type epitaxial layer, a plurality of P-type diffusion regions and a plurality of N-type diffusion regions. The P-type diffusion regions are disposed in the N-type epitaxial layer, and the N-type diffusion regions are respectively disposed in the P-type diffusion regions. Wherein, the P-type diffusion regions are electronically coupled to the N-type diffusion regions.