Fast Vector Rotation in Digital Signal Processors
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Solution Overview
Problem
Portable wireless devices face processing resource constraints due to the high demand of vector rotation operations required for wireless data decoding, which consume limited resources and power.
Innovation Solution
Implementing a fast vector rotation operation in a digital signal processor that performs multiple vector rotations per execution cycle without using multiplications or table lookups, leveraging pipelined processors and specific hardware components to reduce power consumption and enhance decoding speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional multiplication-based vector rotation operations are used for wireless data decoding, then decoding accuracy is maintained, but processing speed decreases and power consumption increases
Solution Approach 1:
The patent changes the computational parameters from traditional multiplication-based operations to CORDIC algorithm operations that use only additions, subtractions, and bit shifts. This parameter change in the computational method reduces power consumption while maintaining decoding accuracy, as the CORDIC algorithm eliminates costly multiplication operations that consume significant power in portable devices.
Solution Approach 2:
The patent substitutes the mechanical multiplication operation with an equivalent CORDIC algorithm implementation that uses simpler arithmetic operations. By replacing the multiplication mechanism with addition and bit-shifting operations, the system achieves faster processing and lower power consumption while preserving the mathematical correctness of vector rotation operations required for decoding.
2Productivity
If multiple vector rotation operations are performed sequentially in a processor cycle, then processing resource constraints are addressed, but execution time increases
Solution Approach 1:
The patent performs preliminary setup of rotation parameters and pre-computes certain values before the actual vector rotation operations. By preparing rotation angles, pre-computed sine and cosine values, or initialization parameters in advance, the system can execute multiple vector rotations more quickly without sequential delays, thereby reducing execution time while maintaining high processing throughput.
Solution Approach 2:
The patent ensures continuous execution of vector rotation operations by eliminating idle cycles between operations. The CORDIC algorithm is designed to perform multiple rotations in a continuous pipeline fashion, where each rotation operation feeds into the next without interruption, maximizing processor utilization and reducing total execution time for multiple vector rotations.
Data Source
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AI summary
Systems and methods to perform fast rotation operations are disclosed. In a particular embodiment, a method includes executing a single instruction. The method includes receiving first data indicating a first coordinate and a second coordinate, receiving a first control value that indicates a first rotation value selected from a set of ninety degree multiples, and writing output data corresponding to the first data rotated by the first rotation value.