Fault Detection Assembly for IC Supply Disconnection
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Solution Overview
Problem
Integrated circuits face unintended activation and potential damage due to floating ground or power supply disconnection, which existing fault detection systems fail to address effectively, leading to undesired operation modes and potential damage.
Innovation Solution
The integrated circuit incorporates a fault detection assembly with MOS-type transistors and a protective diode arrangement, where diodes are connected in series with an input node, and fault detection transistors are coupled to detect non-negligible discharges, generating a detection signal to prevent damage by switching into a protection mode upon supply or ground disconnection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a protective diode arrangement is provided to protect against electrostatic discharge, then the integrated circuit is protected from ESD damage, but the circuit may be unintentionally activated or damaged when supply or ground is disconnected
Solution Approach 1:
The fault detection assembly proactively monitors the operational state of the integrated circuit by continuously detecting voltage levels at the input port and comparing them against expected ranges. This preliminary detection mechanism identifies abnormal conditions such as floating ground or power supply disconnection before they can cause unintended activation or damage, enabling preventive action rather than reactive protection.
Solution Approach 2:
The fault detection assembly acts as an intermediary monitoring layer between the protective diode arrangement and the integrated circuit core. It detects abnormal voltage conditions that indicate supply or ground disconnection and generates fault signals that can trigger protective responses, thereby mediating between the ESD protection structure and the vulnerable circuit elements.
2Difficulty of detecting and measuring
If existing fault detection systems are used, then some fault detection capability is provided, but they fail to detect floating ground or power supply disconnection effectively
Solution Approach 1:
The fault detection assembly employs dedicated detection circuits with distinct functional characteristics optimized for specific detection tasks. Different detection paths monitor different aspects of circuit operation (e.g., voltage level detection, fault signal generation), allowing each local detection element to be precisely tuned for its specific measurement function, thereby achieving high overall detection precision.
Solution Approach 2:
The detection mechanism monitors changes in electrical parameters such as voltage levels at the input port and compares them against predetermined thresholds. When parameters deviate from expected ranges indicating floating ground or power supply disconnection, the system transitions from normal operation to fault detection mode, enabling precise identification of abnormal conditions through parameter monitoring and comparison.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables the integrated circuit to detect and respond to supply or ground disconnections with minimal power consumption and space requirements, effectively preventing damage and ensuring reliable operation, particularly in battery-driven mobile devices.
Implementation Method 1
fault detection transistors are coupled to detect non-negligible discharges, generating a detection signal
Data Source
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AI summary
The present invention relates to a fault detection assembly of an integrated circuit (10) having a supply port (12), an input port (14) and a ground port (16). The fault detection assembly comprises a first diode (20) connected with one end to the supply port (12) and connected with the other end to the input port (14), a second diode (24) connected with one end to the input port (14) and connected with the other end to the ground port (16), at least a first fault detection transistor (30, 32) of MOS type. At least one of first and second diodes (20, 24) comprises a first diode-connected MOS transistor (22, 26) whose gate is connected to the gate of the first fault detection transistor (30, 32).