Fault Detection System Using Feedback Logic Values
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Solution Overview
Problem
Conventional fault detection systems for semiconductor logic circuits face challenges in reducing the amount of test data required for fault coverage, as the number of test input patterns is directly proportional to the amount of test data and fault coverage, making it difficult to decrease the storage capacity for test patterns.
Innovation Solution
A fault detection system that acquires and compares multiple output logic values as updated test input patterns, allowing for reduced test data storage while maintaining fault coverage by selectively acquiring and compressing output logic values, and controlling the clock period for efficient fault detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of test input patterns is increased to improve fault coverage, then fault detection capability is improved, but the amount of test data storage required increases
Solution Approach 1:
The patent implements feedback by acquiring output logic values from the logic circuit and feeding them back as updated test input patterns for subsequent testing cycles. This allows the system to generate new test patterns from existing outputs, reducing the need to store large numbers of pre-defined test input patterns while maintaining comprehensive fault coverage through iterative testing
Solution Approach 2:
The test input patterns are made dynamic by continuously updating them with acquired output logic values during the testing process. Instead of using static pre-stored patterns, the system adapts test patterns in real-time based on circuit responses, enabling reduced storage requirements while maintaining effective fault detection through evolving test sequences
2Reliability
If multiple output logic values are acquired and processed, then fault detection capability is improved, but acquisition time increases
Solution Approach 1:
The system maintains continuous useful action by acquiring output logic values without interrupting the normal operation flow. The acquisition process is integrated into the operational cycles, allowing fault detection data to be collected continuously during regular circuit operation rather than requiring separate dedicated testing periods, thus reducing overall acquisition time
Solution Approach 2:
The logic circuit serves dual purposes by both performing its primary function and providing output logic values for fault detection simultaneously. The circuit's normal operation generates the test data needed for fault detection, eliminating the need for separate dedicated test modes and reducing acquisition time while maintaining comprehensive fault detection capability
3Productivity
If the clock period is reduced to speed up testing, then productivity is improved, but power consumption increases
Solution Approach 1:
The system employs periodic action by using clock signals to control the acquisition and processing of output logic values at optimized intervals. Rather than continuous high-speed operation that would consume excessive power, the clocked periodic operation achieves necessary test speed while allowing power-saving states between clock cycles, thus balancing productivity improvement with power consumption control
Data Source
AI summary
It is a purpose of the invention to provide a fault detection system, etc., having improved fault coverage with a reduced number of test patterns to be input to a logic circuit. The fault detection system detects a fault in a logic circuit based on multiple output logic values of the logic circuit after a test input pattern is input. The output logic values are input to the logic circuit as an updated test input pattern. The system comprises: a first acquisition unit which acquires a part of or all of the output logic values; a comparison unit which compares the logic values acquired by the first acquisition unit with those predicted for when there are no faults, or for when there is a specific fault; and a fault judgment unit which judges whether or not there is a fault based on the comparison result obtained by the comparison unit.