FBGA Packaging Structure Using Template Cavity for Localized Protection
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Solution Overview
Problem
The conventional FBGA packaging process is time-consuming, involves complex mold chase design, and high material and equipment costs due to the need for extensive molding compound coverage.
Innovation Solution
A packaging method using a template with a cavity to form a protective epoxy encapsulation layer over the chip and bonding wires, reducing material consumption and eliminating the need for large-size molding equipment and complex mold design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional molding process is used to cover entire substrate surface, then protection reliability is improved, but material consumption increases and cost increases
Solution Approach 1:
The patent applies local quality by forming the protective layer only in the cavity area where the chip and bonding wires are located, rather than covering the entire substrate surface. This localized approach maintains protection reliability for critical components while significantly reducing molding material consumption and associated costs.
2Reliability
If conventional molding process is used to cover entire substrate surface, then protection reliability is improved, but manufacturing cost increases
Solution Approach 1:
The patent reduces manufacturing cost by implementing local quality - forming the protective layer only where needed (in the cavity) rather than across the entire substrate. This reduces both material costs and molding process complexity, while maintaining adequate protection for the chip and bonding wires.
3Reliability
If molding process is used to cover entire substrate surface, then protection reliability is improved, but process complexity increases
Solution Approach 1:
The patent simplifies the molding process by applying local quality - the protective layer is formed only in the cavity area containing the chip and bonding wires, rather than requiring complex tooling to cover the entire substrate. This reduces mold design complexity and manufacturing difficulty while maintaining protection reliability.
4Reliability
If protective layer covers entire substrate, then protection is improved, but device weight increases
Solution Approach 1:
The patent reduces device weight by implementing local quality - the protective layer is formed only in the cavity area where the chip and bonding wires are located, rather than covering the entire substrate. This maintains protection for critical components while minimizing unnecessary material and weight.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Simplifies the manufacturing process, reduces costs, and minimizes material usage while providing effective protection for the chip and bonding wires, with the added benefit of reduced device weight and height.
Implementation Method 1
the molding compound covers the entire top surface of the substrate, has polymeric cross-linking reactions, and then is cured
Implementation Method 2
removing the template by cleaning the surface coating material with an organic solvent
Data Source
AI summary
Disclosed are a packaging structure, a packaging method and a template used in packaging method. The packaging structure comprises: a substrate; a chip mounted on the substrate; bonding wires for electrically connecting the substrate to the chip; and a protective layer which is formed on the substrate and is used for covering the chip, the bonding wires and bonding pads connected to the bonding wires, the size of the protective layer being smaller than that of the substrate. The packaging structure, the packaging method and the template used in packaging method can solve the problems in the prior art of the great difficulty in designing a mold chase, a complicated molding process, a high manufacturing cost and a high molding material consumption.