FCVD Dielectric Anneal Sequence for Low Nitrogen Impurity

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Solution Overview

Problem

The semiconductor industry faces challenges in achieving high-quality flowable chemical vapor deposition (FCVD) for high aspect ratio fin FETs and nanosheets, particularly in reducing nitrogen impurity and minimizing thermal budget to prevent damage to semiconductor device features.

Innovation Solution

A multi-step anneal process is employed, involving a first anneal step with wet steam at a low temperature for a long time, an intermediate anneal step with higher temperature wet steam, and a final dry anneal step at an even higher temperature, to achieve high FCVD conversion ratio and low nitrogen impurity, thereby improving FCVD quality and reducing thermal budget.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If a single high-temperature anneal step is used to reduce nitrogen impurity, then nitrogen impurity is reduced, but thermal budget increases causing damage to semiconductor device features

Engineering Contradiction:
Improvenitrogen impurityVSAvoidthermal budget
Core Design Contradiction:
Object-generated harmful factorsVSTemperature

Solution Approach 1:

The anneal process is divided into multiple sequential steps with different temperature profiles: a first anneal step at a lower temperature (e.g., 400-600°C) for a longer duration, followed by a second anneal step at a higher temperature (e.g., 700-900°C) for a shorter duration. This segmentation allows nitrogen impurity reduction while limiting total thermal exposure to prevent damage to semiconductor features.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The anneal process uses periodic temperature variations with distinct phases - an initial lower temperature phase for prolonged impurity removal, followed by a higher temperature phase for final purification. This periodic temperature action achieves effective nitrogen reduction while controlling cumulative thermal damage through time-temperature profiling.

Inventive Principle:
Principle #19Periodic action

2Object-generated harmful factors

If anneal time is extended to reduce nitrogen impurity, then nitrogen impurity is reduced, but process time increases reducing productivity

Engineering Contradiction:
Improvenitrogen impurityVSAvoidprocess time
Core Design Contradiction:
Object-generated harmful factorsVSProductivity

Solution Approach 1:

The anneal process is divided into multiple sequential steps with different temperature profiles: a first anneal step at a lower temperature (e.g., 400-600°C) for a longer duration, followed by a second anneal step at a higher temperature (e.g., 700-900°C) for a shorter duration. This segmentation allows nitrogen impurity reduction while limiting total thermal exposure to prevent damage to semiconductor features.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The anneal process changes temperature parameters dynamically - starting with a lower temperature for extended periods to remove nitrogen impurity, then transitioning to a higher temperature for shorter periods to complete purification. This parameter variation optimizes both impurity removal efficiency and total process time, balancing quality with productivity.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If high temperature is applied to improve FCVD conversion ratio, then conversion ratio is improved, but thermal budget increases causing damage to semiconductor device features

Engineering Contradiction:
ImproveFCVD conversion ratioVSAvoidthermal budget
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The anneal process is divided into multiple sequential steps with different temperature profiles: a first anneal step at a lower temperature (e.g., 400-600°C) for a longer duration, followed by a second anneal step at a higher temperature (e.g., 700-900°C) for a shorter duration. This segmentation allows nitrogen impurity reduction while limiting total thermal exposure to prevent damage to semiconductor features.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The multi-step anneal process maintains continuous useful action by ensuring each step contributes to nitrogen impurity removal - the first step removes the majority of nitrogen, and the second step completes the purification. This continuous action achieves high FCVD conversion ratio while controlling total thermal budget through optimized time-temperature profiles.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The multi-step anneal process effectively improves the quality of FCVD by reducing nitrogen impurity and enhancing impurity level, density, and etch resistance, while also reducing the risk of damaging semiconductor device features by minimizing the total thermal budget.

Implementation Method 1

The multi-step anneal process may include a first anneal step that heats a flowable dielectric film using a wet steam at a low temperature for a relatively long time

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 2

an intermediate anneal step using another wet steam at a higher temperature, and a final dry anneal step at another higher temperature

Methodology Applied
Scientific EffectThermal heating: Heating

Implementation Method 3

Flowable chemical vapor deposition (FCVD) using multi-step anneal treatment

Methodology Applied
Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS20250204019A1Flowable chemical vapor deposition (FCVD) using multi-step anneal treatment and devices thereof
Publication Date: 2025.06.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250204019A1 patent drawing
  • US20250204019A1 patent drawing
  • US20250204019A1 patent drawing

AI summary

FCVD using multi-step anneal treatment and devices thereof are disclosed. In an embodiment, a method includes depositing a flowable dielectric film on a substrate. The flowable dielectric film is deposited between a first semiconductor fin and a second semiconductor fin. The method further includes annealing the flowable dielectric film at a first anneal temperature for at least 5 hours to form a first dielectric film, annealing the first dielectric film at a second anneal temperature higher than the first anneal temperature to form a second dielectric film, annealing the second dielectric film at a third anneal temperature higher than the first anneal temperature to form an insulating layer, applying a planarization process to the insulating layer, and etching the insulating layer to STI regions on the substrate.