Fault Detection Feature Extraction in Semiconductor FDC Systems

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Solution Overview

Problem

In semiconductor fabrication, detecting and classifying faults in processing tools is challenging due to reliance on user experience rather than standardized criteria, leading to difficulties in identifying defects during or after the fabrication process.

Innovation Solution

A method involving a computing system that uses sensors to generate profiles of parameters, models these profiles to extract fault-related features, calculates scores based on these features, and displays a ranking to facilitate fault detection and classification, enabling the identification of fault events or errors in semiconductor manufacturing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If user knowledge and experience are used to identify faults on FDC charts, then fault detection can be performed, but the detection is not standardized and relies on subjective judgment

Engineering Contradiction:
Improvefault detection reliabilityVSAvoidfault identification precision
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent replaces the manual, experience-based visual inspection mechanism with an automated image processing and pattern recognition system. The system captures FDC charts, processes them through image analysis algorithms, and automatically identifies fault patterns, eliminating subjective human judgment and providing standardized, precise fault detection.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces an intermediary image processing system that acts as a mediator between the FDC chart display and fault identification. This intermediary layer captures the chart, processes it through standardized algorithms, and outputs structured fault information, bridging the gap between visual data and reliable fault detection.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If standardized criteria are implemented for fault detection, then measurement precision improves, but device complexity increases due to additional processing requirements

Engineering Contradiction:
Improvefault identification precisionVSAvoidprocessing system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments the fault detection process into distinct functional modules: chart capture, image preprocessing, feature extraction, pattern recognition, and result output. Each module performs a specific function, making the overall complex system manageable and maintainable while achieving standardized precise fault identification.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs self-service by automatically capturing FDC charts, processing them through standardized algorithms, and generating fault identification results without requiring external intervention. This automation reduces operational complexity while maintaining high measurement precision through consistent application of detection criteria.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10853534B2Fault related FDC feature extraction
Publication Date: 2020.12.01 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10853534B2 patent drawing
  • US10853534B2 patent drawing
  • US10853534B2 patent drawing

AI summary

A system includes at least one tool, a storage device and a processor. The at least one tool performs semiconductor fabrication processes on at least one wafer, in which the at least one tool includes sensors. The storage device stores computer program codes. The processor executes the computer program codes in the storage device for: modeling profiles from the sensors to generate a modeling result; extracting features from the modeling result corresponding to the modeled profiles; based on the extracted features, extracting scores each representing a degree of the at least one wafer being processed by the at least one tool; and based on the extracted scores, displaying a ranking for fault detection of the at least one wafer.