Feedback-Controlled DRAM Refresh Circuit for Victim-Row Protection

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Solution Overview

Problem

Dynamic random access memory (DRAM) experiences data loss due to the row hammer effect, where repeated access to one word line causes voltage leakage in adjacent memory cells, exacerbated by shrinking word line spacing, necessitating improved refresh mechanisms to mitigate power consumption and data integrity issues.

Innovation Solution

A refresh circuit with a feedback control circuit and a first operation circuit that generates pump signals based on a blast-radius configuration, adjusting refresh rates for adjacent memory rows to mitigate the row hammer effect, ensuring accurate data retention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If refresh operations are performed frequently to prevent data loss from row hammer effect, then data integrity is improved, but power consumption increases

Engineering Contradiction:
Improvedata integrityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies local quality by implementing targeted refresh operations only for memory rows adjacent to actively accessed rows, rather than uniform refresh across all rows. The feedback control circuit identifies victim rows susceptible to row hammer effects and applies refresh operations selectively to those specific locations, thereby maintaining data integrity where needed while reducing unnecessary power consumption in unaffected areas.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs preliminary action by performing refresh operations on victim rows before data loss occurs. The feedback control circuit detects when a row is being actively accessed and proactively triggers refresh operations on adjacent vulnerable rows in advance, preventing data corruption before it happens. This approach ensures data integrity is maintained while avoiding the need for continuous frequent refreshes across the entire memory array.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If word line spacing is reduced to increase memory density, then storage capacity is improved, but voltage leakage between adjacent cells increases

Engineering Contradiction:
Improvememory densityVSAvoidvoltage leakage
Core Design Contradiction:
Quantity of substanceVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by implementing refresh operations that counteract the voltage leakage effect before it causes data loss. The feedback control circuit detects active row access patterns and proactively applies refresh operations to adjacent victim rows, counteracting the cumulative voltage leakage from repeated row hammer accesses. This prevents data corruption despite reduced word line spacing enabling higher memory density.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent employs feedback mechanisms where the feedback control circuit monitors row access patterns and actively accessed row signals, then uses this information to determine which adjacent rows require refresh operations. This closed-loop approach allows the system to adaptively respond to actual row hammer conditions, maintaining data integrity in high-density memory configurations where voltage leakage is more pronounced due to reduced spacing.

Inventive Principle:
Principle #23Feedback

3Use of energy by moving object

If conventional refresh mechanisms are used, then power consumption is reduced, but data integrity deteriorates due to row hammer effect

Engineering Contradiction:
Improvepower consumptionVSAvoiddata integrity
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies dynamics by transitioning from static, uniform refresh intervals to dynamic, adaptive refresh operations. The feedback control circuit continuously monitors row access patterns and adjusts refresh operations in real-time based on actual row hammer conditions. This dynamic approach ensures data integrity is maintained during high-activity periods while reducing refresh operations during low-activity periods, optimizing the balance between power consumption and data protection.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs feedback control where the feedback control circuit receives signals about actively accessed rows and uses this information to dynamically determine which adjacent rows require refresh operations. This feedback mechanism enables the system to provide enhanced protection against row hammer effects when needed while reducing unnecessary refresh operations when no row hammer activity is detected, thereby maintaining data integrity without excessive power consumption.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20260100215A1Refresh circuit and memory
Publication Date: 2026.04.09 RUILI INTEGRATED CIRCUIT CO LTD
  • US20260100215A1 patent drawing
  • US20260100215A1 patent drawing
  • US20260100215A1 patent drawing

AI summary

The present disclosure provides a refresh circuit and a memory. A feedback control circuit is configured to: receive a pump delay signal and a blast-radius configuration, generate a pump trigger signal based on the pump delay signal, and terminate the generation of the pump trigger signal in the case that a quantity of pump signals expected to be generated meets a requirement of the blast-radius configuration. The pump signal is generated in the case that a refresh signal or the pump trigger signal is in an enabled state. A rising edge of the pump delay signal is delayed relative to a rising edge of the pump signal by a first preset duration.