Feedback Equalizer Architecture for Shorter Critical Paths
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Prior art feedback equalizers face challenges in minimizing the critical path time, which limits the maximum operating speed due to complex circuit implementations and high-speed equalization requirements, especially at frequencies like 1 GHz.
Innovation Solution
The implementation of a feedback equalizer that reduces the critical path time through parallel operation of summation components, pre-computation of coefficients, and the use of adaptive feedback equalization with parallelism or look-ahead architectures, along with adaptation engines like differential charge pumps and switch coefficient adaptation algorithms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a feedback equalizer is implemented to compensate for channel dispersion in high-speed communications, then equalization performance is improved, but the critical path time increases limiting maximum operating speed
Solution Approach 1:
The feedback equalizer is divided into multiple parallel summation components that operate simultaneously on different segments of the feedback signal. This segmentation allows the critical path to be processed in parallel rather than sequentially, reducing the overall critical path time while maintaining equalization performance.
Solution Approach 2:
Coefficients for the feedback equalizer are pre-computed and stored before the equalization process begins. This preliminary action eliminates the need for real-time coefficient calculation during the critical path, thereby reducing the operating speed requirements and allowing faster circuit operation.
2Measurement precision
If complex circuit implementations are used to achieve high-speed equalization, then equalization accuracy is improved, but device complexity increases
Solution Approach 1:
The complex equalization function is segmented into multiple simpler summation components that operate in parallel. Each component performs a simpler operation, but collectively they achieve the same accuracy as a single complex implementation, thereby reducing individual component complexity while maintaining overall accuracy.
Solution Approach 2:
Instead of implementing a single complex equalization path, multiple simplified copies of the summation component are created and operated in parallel. This copying approach maintains the accuracy of the original complex design while reducing the complexity of each individual component.
Data Source
AI summary
A feedback equalizer is provided that minimizes the critical path time in a multi-level modulation receiver. The critical path is reduced by parallel operation of some summation components of the feedback equalizer. The critical path is further reduced by pre-computing coefficients for the feedback equalizer. Further, the critical path is reduced using an adaptive feedback equalizer which uses parallelism or pre-computation to calculate the feedback equalization coefficients using an adaptation engine.