Grounded switching elements shift notch frequency without parasitic inductance, enabling smaller, simpler band-elimination filters.
Channel-aware switching between nominal and alternative equalizer time periods cuts software receiver processing and power use under multipath fading.
Likelihood exchange between antenna equalizers improves diversity gain, signal detection, and interference suppression in wireless reception.
Selecting low-autocorrelation data subsets helps LMS and timing recovery engines converge faster and avoid incorrect solutions.
Feedback calibration measures cumulative delay across repeated passes and adjusts a tunable delay line to keep signal timing stable.
Switchable parallel capacitance in a diplexer shifts antenna resonances, expanding multi-band coverage in compact RF antenna designs.
Multiple adaptive gain stages split channel-loss compensation, enabling low-voltage CMOS equalization with tolerable jitter and lower power.
Cross-correlation with ideal training signals directly solves equalizer tap values, improving channel compensation without iterative derivation.
Parallel derivative-based equalization reduces pre- and post-cursor ISI with independent tuning and less phase shift in high-frequency links.
Digital sampling, moving-average filtering, and feedback cut CMOS amplifier noise while removing bulky passive elements and easing control.
Routing differential pairs to straddle ground vias enables larger anti-pads, 50 ohm signal via impedance, and lower cross-talk in PCB pinfields.
A resonant cavity tied to the MOS gate lets a common-gate LNA reject adjacent-channel interference and reduce external RF filter needs.
Current-mode summing taps replace delay-heavy FFE stages to handle pre- and post-cursor ISI with lower power and less jitter.
Voltage-controlled varactors tune duplexer center frequency and bandwidth on one silicon chip, cutting resonant sections, cost, and linearity loss.
A graded noble-metal coating on a non-noble lead wire cuts feedthrough cost while preserving adhesion, biocompatibility, and hermetic sealing.
By subtracting the signal of interest to expose residue bands, the receiver detects and removes weak narrowband interference for cleaner decoding.
Phase-error feedback and aggressor-based filtering cancel PLL oscillator pushing and pulling, improving stability and reducing phase noise.
Multi-stage receiver equalization uses programmable DFE stages to correct intersymbol interference and improve high-speed serial data accuracy.
Received signal strengths in two frequency bands set a compensation ratio, letting an adaptive equalizer match cable-length attenuation without test sequences.
A passive RC equalizer built into the connector compensates PCB high-frequency loss while reducing jitter, power use, and radiation.
Matched AC impedance equalizes wire voltages to suppress common-mode noise and protect field-device sensor communication.
A series LC output network forms a band-pass match that flattens wideband gain while limiting reflections, oscillation, area, and power.
Unified RF power and impedance control stabilizes dynamic plasma loads with faster matching, cross-coupling compensation, and robust setpoint regulation.
Receiver error and quantizer decisions update TX FIR pre/post-cursor taps over a back channel to reduce ISI from channel distortion.
A multi-branch equalizer uses recursive direct matrix inversion to cancel co-channel and adjacent-channel interference in RF bursts.
Intertwined coupled inductors with capacitors sharpen low-pass roll-off, add attenuation notches, and save integrated circuit area.
Digital filtering shapes UWB pulses to maximize FCC-mask power and bandwidth while suppressing WLAN narrow-band interference.
Early/late edge timing and bit-pattern detection adjust equalization in real time to counter intersymbol interference and improve sampling accuracy.
Auto-tuned flat coil resonators maintain wireless power efficiency across changing distance and orientation while reducing bulky resonator structures.
Even-odd RTZ latch slicing removes intervening logic in the feedback path, cutting DFE delay and reducing ISI at high data rates.
Multiple modulus regions let a QAM blind equalizer cut adaptation error and converge faster under severe channels and high-order constellations.
Integrating impedance matching into a BAW resonator filter cuts discrete RF components, insertion loss, board area, and power amplifier losses.
An integrated end-cover capacitor closes balun shield gaps in MRI receivers, reducing common-mode currents and unwanted signal feedback.
Blind forward-backward estimation jointly models desired and interfering channels without synchronization, improving wireless signal quality.
A resistor-ladder attenuator with digitally controlled CMOS switch banks delivers fine dB steps, low distortion, and strong channel selectivity.
A two-stage channel shortening filter concentrates signal energy and cancels delay-spread tails to cut OFDM ISI with lower receiver complexity.
Tunable transmission-line reflection loads simplify precise phase-shift control in quadrature-coupler phase shifters for phased-array beamforming.
Periodic FEQ coefficient updates use averaged, normalized received signals to maintain equalization accuracy under noise and channel drift.
Parallel through-hole signal paths cut transmission-line inductance in layered HF modules, helping maintain stable impedance matching.
Parallel acoustic wave filters with different multimode apertures improve impedance matching, cut insertion loss, and enable compact multi-band coverage.
A three-stage BTIC receiver cancels precursor and postcursor ISI in multipath DSSS WLAN links without feedforward equalization complexity.
Adaptive multistage gain control compensates channel frequency loss while keeping stages below saturation to improve jitter and data restoration.
Known sequences between burst sub-blocks enable parallel equalization, lowering receiver clock frequency and power at very high data rates.
A weighted signal and noise-filtering projection help adaptive equalizers cut transition-related errors and improve convergence reliability.
Wavelet-based PHY filtering separates random idle-state noise to expand noise margin and prevent false activation on high-speed serial links.
Integrating impedance matching into a BAW resonator network cuts discrete RF components, board area, insertion loss, and manufacturing cost.
Parallel summation and precomputed coefficients shorten the feedback equalizer critical path, enabling faster high-speed receiver operation.
Phase-shifted polyphase filter stages suppress unwanted harmonics on-chip while minimizing attenuation of the fundamental signal.
A two-stage continuous-time equalizer with programmable zeros improves 10+ Gbps reception while limiting noise amplification and power use.
Threshold-based coefficient selection cuts channel equalizer updates, speeding Kalman convergence while lowering computational power.