FeFET Memory Array Layout for In-Memory Matrix Transposition
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Solution Overview
Problem
Existing computer implementations of matrix operations, such as transposition, are computation-intensive and require significant additional memory or multiple read/write operations, making them inefficient.
Innovation Solution
Utilizing a memory array with ferroelectric transistor memory (FeRAM) that allows data to be written in columns and read in rows, leveraging the circuit design of FeFETs to perform matrix transposition without additional memory or extensive reordering by writing and reading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional computer implementations are used for matrix operations, then the operations can be performed, but the computational intensity increases and memory requirements increase
Solution Approach 1:
The patent replaces conventional von Neumann architecture with in-memory computing using FeRAM array, where matrix operations are performed directly within the memory array rather than requiring data to be moved between CPU and memory. This substitutes the mechanical data transfer process with direct computational operation within the memory structure, eliminating the need for additional memory and reducing computational overhead.
Solution Approach 2:
The FeRAM array serves multiple functions simultaneously: it acts as both storage memory and computational processor. The same memory array that stores matrix data also performs the matrix transposition operation through column-by-column reading and row-by-row writing, eliminating the need for separate dedicated computational hardware and reducing overall system complexity.
2Ease of operation
If additional memory is used for matrix transposition, then the transposition can be performed, but the memory requirements increase
Solution Approach 1:
The memory array performs self-transposition without requiring external additional memory. The FeRAM array uses its own internal structure to store the transposed data by reading columns and writing rows within the same array boundaries, allowing the memory system to serve its own computational needs without external assistance.
Solution Approach 2:
The patent implements nested storage where the transposed matrix is stored within the same memory array that contains the original matrix. By utilizing the same physical memory space for both the input matrix and the transposed output, the system avoids the need for separate memory allocations, effectively nesting one data structure within another.
3Productivity
If multiple read/write operations are used for matrix transposition, then the transposition can be achieved, but the operational time increases
Solution Approach 1:
The patent enables continuous in-place transformation where the FeRAM array continuously reads from columns and writes to rows without interruption or sequential batching. This continuous operation eliminates idle time between read/write cycles and maintains productive action throughout the transposition process, significantly reducing total operational time compared to conventional sequential operations.
Data Source
AI summary
A system for processing a data array, such as transposing a matrix, includes a two-dimensional array of memory cells, such as FeFETs, each having an input end, an output end and a control end. The system also includes an input interface is adapted to supply signals indicative of a subset of the data array, such as a row of a matrix, and output control signals to the input ends of a selected column of the memory cells. The system further includes an output interface adapted to receive the data stored in the memory array from the output ends of a selected row of the memory cells. A method of processing a data array, such as transposing a matrix, include writing subsets of the data array to the memory array column-by-column, and reading from the memory cells, row-by-row.