FeFET PUF Apparatus for Stable IoT Security
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Solution Overview
Problem
Conventional PUF apparatuses face challenges in stability, area efficiency, and power consumption, particularly in IoT devices, due to their reliance on volatile memory and complex circuitry, which affects their security and manufacturing costs.
Innovation Solution
A PUF apparatus utilizing a ferroelectric element-based FeFET pair with a read-write-back block that amplifies and writes back responses, eliminating the need for separate write-back circuits and reducing static current, thereby enhancing stability and minimizing power consumption while compacting the design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If conventional PUF apparatuses use volatile memory structures like SRAM, then area efficiency is improved, but stability deteriorates due to variations according to environmental factors such as temperature or supply voltage
Solution Approach 1:
The patent changes the fundamental parameter of memory type from volatile (SRAM) to non-volatile (FeFET), which fundamentally alters the stability characteristics while maintaining compact area. The ferroelectric material's hysteresis loop provides stable threshold voltage states that are insensitive to temperature and supply voltage variations.
2Reliability
If separate write-back circuits are added to improve response storage capability, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent merges the PUF cell and write-back circuit into a single integrated structure. The FeFET pair itself serves as both the PUF element and the storage element, eliminating the need for separate write-back circuits. The cross-coupled FeFET structure inherently provides the write-back function through its stable state retention capability.
3Reliability
If FeFET pair structure is used to generate responses, then stability is improved, but manufacturing precision requirements increase due to process variation sensitivity
Solution Approach 1:
The patent converts the harmful effect of process variations into a beneficial feature. Instead of trying to minimize variations, the design exploits them to create distinct threshold voltage differences between the two FeFETs, which form the basis of the PUF response. The random variations in manufacturing become the source of the unique, unclonable response.
4Ease of manufacture
If conventional memory PUF structures are used, then ease of manufacture is improved, but power consumption increases due to static current in non-volatile memory structures
Solution Approach 1:
The patent employs periodic action by using transient current only during the brief measurement phase, while the FeFET maintains its state without static current during storage. The ferroelectric material's non-volatile nature allows the state to be retained indefinitely without power consumption, and current is drawn only when reading the response.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The ferroelectric element-based PUF apparatus achieves high stability and reduced power consumption, enabling compact size and efficient operation, addressing the limitations of conventional PUFs in IoT devices.
Implementation Method 1
PUF apparatus based on ferroelectric elements
Data Source
AI summary
A PUF apparatus comprises: a PUF cell array in which a plurality of PUF cells are arranged each including a FeFET pair whose gates are commonly connected to a corresponding word line among a plurality of word lines, and whose drains and sources are connected to a corresponding bit line pair and a corresponding source line pair among a plurality of bit line pairs and a plurality of source line pairs running in a direction crossing the plurality of word lines; and a read-write-back block which is activated according to a read enable signal, and senses and amplifies a voltage difference occurring in a corresponding bit line pair among the plurality of bit line pairs according to the difference in driving strength due to a deviation in a manufacturing process of the FeFET pair in the PUF cell selected by a selected word line among the plurality of word lines.