FeFET Synapse Pairing for Linear Neuromorphic Weight Response
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Solution Overview
Problem
Current synapse devices in neuromorphic processors lack a linear response characteristic to applied voltage, which hinders the performance of neural network operations in terms of efficiency and accuracy.
Innovation Solution
A synapse device comprising a pair of ferroelectric field effect transistors with different coercive voltages and ferroelectric layer thicknesses, configured to switch between discrete electrical conductance values based on applied voltage, ensuring a linear and reliable response.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a simple structure of nonvolatile memory is implemented as a synapse device, then the area of the synapse device is reduced and power consumption is reduced, but the linear response characteristic to applied voltage is not achieved
Solution Approach 1:
The patent combines multiple ferroelectric field effect transistors with different coercive voltages into a single synapse device unit. This merging allows the device to achieve linear response characteristics through the collective behavior of multiple transistors while maintaining a compact structure that reduces overall area compared to traditional implementations.
Solution Approach 2:
The patent utilizes parameter changes by employing ferroelectric field effect transistors with different coercive voltages. By varying the coercive voltage parameter across multiple transistors and combining them, the system achieves a linear response characteristic that neither individual transistor could provide alone, while the nonvolatile memory structure keeps the area reduced.
2Reliability
If ferroelectric field effect transistors with different coercive voltages are used, then a linear response characteristic is achieved, but the device complexity increases
Solution Approach 1:
The patent segments the synapse device into multiple ferroelectric field effect transistors, each with a specific coercive voltage. This segmentation allows the complex linear response characteristic to be achieved through simpler individual transistor units, making the overall device design and fabrication more manageable despite the multiple components.
Solution Approach 2:
By systematically varying the coercive voltage parameter across a series of transistors, the patent creates a structured complexity that is easier to design and manufacture. The parameter changes follow a deliberate pattern that simplifies the overall device architecture compared to using completely different transistor types or structures.
3Reliability
If multiple ferroelectric field effect transistors are combined, then a linear response characteristic is achieved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent achieves linear response characteristics by varying the coercive voltage parameter across multiple transistors rather than requiring precise control of transistor count or geometry. This parameter-based approach is more tolerant of manufacturing variations because coercive voltage can be adjusted through material composition or layer thickness, which are easier to control with standard fabrication processes than transistor dimensional precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The synapse device achieves a linear and reliable response to applied voltage, enhancing the performance and accuracy of neural network operations by allowing discrete weight values to be represented arithmetically, thereby improving the overall efficiency of neuromorphic processing.
Implementation Method 1
Each of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor further includes: a channel region between the source region and the drain region; and a ferroelectric layer between the channel region and the gate electrode
Data Source
AI summary
A synapse device including a ferroelectric field effect transistor, and a neural network apparatus including the same, are provided. The synapse device includes a first ferroelectric field effect transistor and a second ferroelectric field effect transistor electrically connected in parallel with the first ferroelectric field effect transistor, wherein the first ferroelectric field effect transistor may have a first coercive voltage, and the second ferroelectric field effect transistor may have a second coercive voltage that is greater than the first coercive voltage.


