FeFET TCAM Cell Architecture for Low-Transistor Ternary Matching

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Solution Overview

Problem

Conventional CAM devices, particularly TCAMs implemented with CMOS, suffer from low data density and high power consumption due to the use of multiple transistors per bit, which complicates the memory structure and increases energy consumption.

Innovation Solution

The implementation of ferroelectric field-effect transistor (FeFET)-based memory elements in TCAMs, which reduces the number of transistors required per bit and enhances performance by allowing storage of three values: '0', '1', and 'X' (don't-care), thereby improving device density and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional CMOS devices are used to implement TCAM, then high-speed searching capabilities are achieved, but data density decreases and power consumption increases due to requiring at least fourteen transistors per bit

Engineering Contradiction:
Improvesearching speedVSAvoidnumber of transistors per bit
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent combines multiple functions into a single FeFET device: the ferroelectric memory cell stores data bits, while the same device structure enables content-addressable search operations. This merging eliminates the need for separate transistor arrays required in traditional CMOS TCAM, reducing the transistor count from fourteen per bit to a significantly lower number while maintaining both storage and search capabilities.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent changes the fundamental operating parameter from volatile CMOS switching to non-volatile ferroelectric polarization states. By utilizing the hysteresis characteristic of ferroelectric materials, the system achieves stable binary states (0 and 1) without requiring continuous power supply or complex refresh circuits, thereby simplifying the device structure and reducing transistor requirements.

Inventive Principle:
Principle #35Parameter changes

2Speed

If traditional CMOS devices are used to implement TCAM, then high-speed searching capabilities are achieved, but power consumption increases due to the complex transistor structure

Engineering Contradiction:
Improvesearching speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by stationary object

Solution Approach 1:

The ferroelectric material inherently maintains its polarization state without external power, providing non-volatile storage. The FeFET structure utilizes the natural hysteresis loop of the ferroelectric material to maintain binary states, eliminating the need for continuous power supply to CMOS transistors for state maintenance, thereby significantly reducing static power consumption.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

By merging the memory storage function and search function into a single FeFET-based structure, the patent eliminates the need for separate power-consuming CMOS transistor arrays. The same ferroelectric device that stores data also performs the content-addressable search, reducing overall power consumption compared to traditional CMOS TCAM implementations.

Inventive Principle:
Principle #5Merging (Combining)

3Device complexity

If FeFET-based memory elements are used in TCAM, then data density improves and power consumption reduces, but the ability to store only binary values is limited compared to ternary storage

Engineering Contradiction:
Improvetransistor count per bitVSAvoiddata storage capacity
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent segments the FeFET device into functionally distinct regions: a first FeFET for storing data bits and a second FeFET for storing complement bits. This segmentation enables ternary content-addressable memory operation by comparing input data against both the stored data and its complement, effectively achieving three-state (0, 1, and don't-care) storage capability while using simpler FeFET structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces complement bit storage as an intermediary mechanism to achieve ternary functionality. By storing both the original data bits and their complements in separate FeFET structures, the system can represent three states: match (when both data and complement match), no-match (when neither matches), and don't-care (when either matches). This intermediary approach enables enhanced storage versatility without requiring complex single-device ternary FeFET structures.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The FeFET-based TCAMs provide improved speed, reduced complexity, and lower power consumption while maintaining high search capabilities, offering increased flexibility with the inclusion of don't-care values in data storage and retrieval operations.

Implementation Method 1

The memory element may include a ferroelectric layer

Methodology Applied
Scientific EffectFerroelectricity:

Implementation Method 2

Each data storage unit may include a matchline (ML) switching transistor

Methodology Applied
Scientific EffectField-effect transistor operation:

Data Source

PatentUS20260105944A1Ferroelectric FET-based content addressable memory
Publication Date: 2026.04.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260105944A1 patent drawing
  • US20260105944A1 patent drawing
  • US20260105944A1 patent drawing

AI summary

An efficient FeFET-based CAM is disclosed which is capable of performing normal read, write but has the ability to match input data with don't-care. More specifically, a Ferroelectric FET Based Ternary Content Addressable Memory is disclosed. The design in some examples utilizes two FeFETs and four MOSFETs per cell. The CAM can be written in columns through multi-phase writes. It can be used a normal memory with indexing read. It also has the ability for ternary content-based search. The don't-care values can be either the input or the stored data.