FeRAM-DRAM Hybrid Memory Segmentation and Transfer Gate Coupling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Ferroelectric random access memory (FeRAM) devices suffer from fatigue and degradation due to repeated polarization inversions, limiting their read-out and writing operations, while volatile DRAM requires frequent refreshing to prevent data loss, leading to high power consumption and operational challenges, especially in mobile devices.
Innovation Solution
A hybrid memory device configuration that combines a DRAM array operating in volatile mode with a FeRAM array operating in non-volatile mode, sharing sense amplifiers and using transfer gates to selectively couple FeRAM cells to digit lines, allowing for efficient read/write operations without polarization inversion and reducing power consumption by minimizing refresh cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If FeRAM operates with repeated polarization inversions to enable read/write operations, then data storage capability is improved, but ferroelectric capacitor fatigue increases and operational lifespan decreases
Solution Approach 1:
The patent segments the memory system into two distinct arrays: a FeRAM array for non-volatile storage and a DRAM array for volatile storage. This segmentation allows each array to operate independently with optimized access patterns, reducing the burden of repeated polarization inversions on the FeRAM capacitors while maintaining high productivity through the DRAM array.
Solution Approach 2:
The patent changes the operational parameters of the FeRAM array by disabling polarization inversion and operating in a read-only or limited-write mode. This parameter change reduces fatigue accumulation in the ferroelectric capacitors, extending their operational lifespan while the DRAM array handles the bulk of write operations.
2Speed
If DRAM is used for volatile storage to achieve fast access speeds, then read/write speed is improved, but frequent refreshing is required leading to high power consumption
Solution Approach 1:
The patent merges FeRAM and DRAM arrays into a hybrid memory system that leverages the strengths of both technologies. The DRAM array provides fast access speeds for frequently accessed data, while the FeRAM array provides non-volatile storage for less frequently accessed data, reducing the overall refresh requirements and power consumption of the system.
Solution Approach 2:
The patent implements selective refreshing where only the DRAM array requires periodic refresh operations, while the FeRAM array does not. This periodic action is applied only where necessary, significantly reducing the overall power consumption compared to refreshing entire DRAM systems.
3Duration of action of stationary object
If FeRAM capacitors are used to achieve non-volatile storage, then data retention is improved, but fatigue from repeated operations reduces reliability
Solution Approach 1:
The patent segments the memory system into two distinct arrays: a FeRAM array for non-volatile storage and a DRAM array for volatile storage. This segmentation allows each array to operate independently with optimized access patterns, reducing the burden of repeated polarization inversions on the FeRAM capacitors while maintaining high productivity through the DRAM array.
Solution Approach 2:
The patent effectively treats the DRAM array as a disposable or replaceable component that handles the wear-intensive operations. When DRAM cells degrade from frequent write operations, they can be refreshed or replaced without affecting the FeRAM array, which retains data with high reliability over its extended operational lifespan.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The hybrid memory device extends the operational lifespan of FeRAM by reducing fatigue and power consumption, enabling more efficient data storage and retrieval with lower refresh rates, thus improving performance and energy efficiency.
Implementation Method 1
the ferroelectric capacitor of a FeRAM has a characteristic in which the ferroelectric characteristic by a residual polarization component and the paraelectric characteristic by a normal capacitor component are combined with each other
Data Source
AI summary
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. One method includes determining whether to access a first memory cell of a first memory cell array or a second memory cell of a second memory cell array, where a first digit line coupled to the first memory cell is coupled to a paging buffer register including a sense amplifier. The method further includes operating a transfer gate based at least in part on determining to read the second memory cell of the second memory cell array, where the transfer gate is configured to selectively couple a second digit line coupled to the second memory cell to the paging buffer register through the first digit line.