Offset Cancellation in FeRAM Sense Components
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory devices face issues with voltage disparity between input nodes, leading to voltage offsets that cause current leakage and loss of stored information, particularly in ferroelectric RAM (FeRAM) devices, which affect the accuracy of access operations and increase power consumption due to the need for frequent refresh operations.
Innovation Solution
The implementation of a technique called offset cancellation, where capacitors are coupled to transistors in the sense component, and a switching component is used to connect these capacitors to a voltage source, reducing voltage offsets and enabling more accurate access operations without increasing the memory device's area, thereby improving data retention and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If voltage disparity exists between input nodes to the sense component, then current leakage occurs from capacitors and stored information is lost, but adding offset cancellation circuitry increases device complexity
Solution Approach 1:
The offset cancellation circuit is divided into separate functional blocks: a first capacitor coupled to a first input node, a second capacitor coupled to a second input node, and a switching component that selectively connects these capacitors to a voltage source. This segmentation allows each component to perform its specific function while keeping the overall circuit manageable and modular.
Solution Approach 2:
The switching component acts as an intermediary that controls the connection between the capacitors and the voltage source. By selectively activating the switching component, the circuit can cancel voltage offsets without continuously drawing power, thus managing complexity through controlled operation rather than permanent connection.
2Measurement precision
If voltage offset is present in the sense component, then access operation accuracy is reduced, but implementing offset cancellation increases power consumption
Solution Approach 1:
The switching component is activated periodically or selectively rather than continuously to establish the voltage offset cancellation. This periodic activation allows the capacitors to be charged to compensate for voltage offsets during access operations, while minimizing power consumption during idle periods when cancellation is not needed.
Solution Approach 2:
The circuit changes the voltage parameter at the input nodes by connecting capacitors to a voltage source through the switching component. This parameter change dynamically adjusts the voltage levels to compensate for offsets during read operations, improving accuracy without requiring continuous power consumption.
3Reliability
If capacitors are coupled to transistors in the sense component to reduce voltage offsets, then the memory device area increases, but the patent aims to maintain compact layout
Solution Approach 1:
The offset cancellation capacitors are merged with the existing sense component structure. The first and second capacitors are coupled to the first and second transistors of the sense component, utilizing the existing transistor footprint and routing infrastructure. This merging approach allows voltage offset reduction while minimizing additional area by sharing common components and structures.
Data Source
AI summary
Methods, systems, and devices for offset cancellation for latching in memory devices are described. A memory device may include a sense component comprising a first and second transistor. In some cases, a memory device may further include a first capacitor coupled to the first transistor and a second capacitor coupled to the second transistor and a first switching component coupled between a voltage source and the first capacitor and the second capacitor. For example, the first switching component may be activated, a reference voltage may be applied to the sense component, and the first switching component may then be deactivated. In some examples, a voltage offset may be measured across both the first and the second capacitor.