Ferroelectric C-Element Circuits for Low-Voltage Asynchronous Logic

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing asynchronous logic circuits face challenges in operating efficiently at low voltage conditions due to the need for stacks of transistors between the power supply rail and ground rail, leading to high power consumption and large area requirements.

Innovation Solution

The development of asynchronous circuits using threshold gates and majority/minority gates with capacitive input circuits, which reduce the stack of devices between the supply node and ground, allowing operation at lower power supply levels and achieving area reduction and higher throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If stacks of transistors are used between power supply rail and ground rail in asynchronous logic circuits, then the circuits can be implemented with conventional logic components, but the area requirements and power consumption increase significantly

Engineering Contradiction:
Improveimplementability with conventional componentsVSAvoidcircuit area
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The patent transitions from planar transistor stacking to three-dimensional vertical capacitor stacking. By stacking ferroelectric capacitors vertically between the power supply rail and ground rail, the circuit achieves higher integration density without increasing lateral area, effectively resolving the contradiction between manufacturability and area efficiency

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent changes the fundamental circuit parameter from transistor-based switching to capacitor-based threshold switching. This parameter change enables the circuit to operate with fewer devices in the vertical stack, reducing area while maintaining functionality through the unique properties of ferroelectric capacitors

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If stacks of transistors are used between power supply rail and ground rail in asynchronous logic circuits, then the circuits can be implemented with conventional logic components, but the power consumption increases

Engineering Contradiction:
Improveimplementability with conventional componentsVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSUse of energy by stationary object

Solution Approach 1:

The patent changes the operating parameter from transistor switching to capacitor threshold switching. Ferroelectric capacitors exhibit bistable polarization states that can represent logic levels without continuous power consumption, enabling ultra-low power operation while maintaining compatibility with conventional fabrication processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts the switching function from traditional transistors and assigns it to ferroelectric capacitors. This extraction eliminates the need for multiple transistor stacks required in conventional designs, thereby reducing both power consumption and area while preserving implementability

Inventive Principle:
Principle #2Taking out (Extraction)

3Use of energy by moving object

If fewer devices are stacked between supply node and ground to enable low voltage operation, then the power supply level can be reduced, but the circuit functionality must be maintained

Engineering Contradiction:
Improvepower supply levelVSAvoidcircuit functionality
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The ferroelectric capacitor serves multiple functions simultaneously: it acts as the threshold element for logic operations, provides non-volatile memory functionality through its bistable states, and enables low-voltage operation due to its high breakdown field. This multi-functionality maintains circuit reliability while reducing the power supply level

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent employs composite material structures, specifically stacking multiple ferroelectric capacitor layers with different orientations and properties. This composite approach enables the circuit to maintain robust functionality across varying voltage conditions while operating at lower supply levels, resolving the contradiction between voltage reduction and functional reliability

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed solution results in asynchronous circuits that can operate at lower power supply levels, reducing area requirements and increasing throughput, while also enabling operation as synchronous circuits by using clock signals as input.

Implementation Method 1

The capacitive input circuit includes a first ferroelectric capacitor and a second ferroelectric capacitor

Methodology Applied
Scientific EffectFerroelectricity:

Data Source

PatentUS12015402B1Asynchronous consensus circuit with stacked ferroelectric non-planar capacitors
Publication Date: 2024.06.18 KEPLER COMPUTING INC
  • US12015402B1 patent drawing
  • US12015402B1 patent drawing
  • US12015402B1 patent drawing

AI summary

Asynchronous circuit elements are described. Asynchronous circuit elements include a consensus element (c-element), completion tree, and validity tree. The c-element is implemented using adjustable threshold based multi-input capacitive circuitries. The completion tree comprises a plurality of c-elements organized in a tree formation. The validity tree comprises OR gates followed by c-elements. The multi-input capacitive circuitries include capacitive structures that may comprise linear dielectric, paraelectric dielectric, or ferroelectric dielectric. The capacitors can be planar or non-planar. The capacitors may be stacked vertically to reduce footprint of the various asynchronous circuitries.