Ferroelectric Capacitor Residue Removal via Plasma Etch
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Solution Overview
Problem
The patterning of noble metals in ferroelectric capacitor structures often results in conductive by-products that cause current leakage, leading to reduced yields in semiconductor devices due to ineffective removal of these residues during the fabrication process.
Innovation Solution
A physical plasma etch clean-up process is introduced at an intermediate stage in the fabrication of ferroelectric capacitors, maintaining a substrate temperature greater than 60°C to remove conductive residues generated during patterning, thereby reducing current leakage without altering the dimensions of the electrodes and ferroelectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If physical vapor deposition is used to deposit noble metal layers, then electrode material is deposited conformally, but conductive residues are generated on sidewalls during patterning
Solution Approach 1:
A first plasma etch clean-up process is performed immediately after patterning the noble metal layers to remove conductive residues from sidewalls before subsequent fabrication steps can redeposit them. This preliminary cleaning action prevents the harmful residues from causing current leakage in the final device.
Solution Approach 2:
The plasma etch clean-up process uses specific parameter settings including substrate temperature maintained between -50°C and 150°C, pressure between 1-100 mTorr, and power between 50-500 Watts to optimize residue removal while preserving the capacitor structure dimensions.
2Reliability
If conventional cleaning methods are used after patterning, then conductive residues remain on sidewalls, but device yields are reduced due to current leakage
Solution Approach 1:
A plasma environment with reactive species acts as a strong oxidizing medium that effectively removes conductive residues from sidewalls. The plasma chemistry enables rapid oxidation and removal of metal residues that conventional cleaning methods cannot eliminate, thereby preventing current leakage paths.
3Object-generated harmful factors
If plasma etch clean-up is performed at room temperature, then conductive residues are removed, but substrate processing time increases
Solution Approach 1:
The substrate temperature during plasma etch clean-up is optimized to range from -50°C to 150°C, with particular emphasis on maintaining temperature above 60°C during the removing step. This temperature control accelerates the residue removal kinetics and reduces processing time compared to room temperature operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly decreases current leakage in capacitors, improving device yields by effectively removing conductive residues before additional fabrication steps can redeposit them, thus maintaining the integrity of the capacitor structures.
Implementation Method 1
removing the conductive residue using a physical plasma etch clean-up process that includes maintaining a substrate temperature that is greater than about 60° C.
Data Source
AI summary
A method of manufacturing a semiconductor device. The method comprises forming conductive and ferroelectric material layers on a semiconductor substrate. The material layers are patterned to form electrodes and a ferroelectric layer of a ferroelectric capacitor, wherein a conductive residue is generated on sidewalls of the ferroelectric capacitor as a by-product of the patterning. The method also comprises removing the conductive residue using a physical plasma etch clean-up process that includes maintaining a substrate temperature that is greater than about 60° C.