Ferroelectric Memory Cell Voltage Accumulation Discharge
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Solution Overview
Problem
Ferroelectric memory cells experience cell leakage and corruption due to unintended charge storage during access operations, leading to data degradation and increased power consumption in memory arrays, especially in volatile memory devices like DRAM.
Innovation Solution
Isolating sections of ferroelectric memory cells and applying a voltage to their access lines to discharge capacitors, equilibrating them to 0V, which prevents corruption and reduces power consumption by using existing access lines and fewer control lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If access operations are performed on ferroelectric memory cells, then data access speed is improved, but cell leakage and corruption occur due to unintended charge storage
Solution Approach 1:
The patent converts the harmful unintended charge storage (cell leakage) into a beneficial periodic discharge operation. By intentionally discharging capacitors in isolated sections at scheduled intervals, the system prevents charge accumulation that would otherwise cause corruption, thereby transforming a reliability problem into a controlled maintenance operation that preserves data integrity while maintaining access speed.
Solution Approach 2:
The patent performs preliminary discharge operations on isolated sections before they can accumulate harmful charge levels. By proactively discharging capacitors in sections that have been isolated from access operations, the system prevents corruption before it occurs, ensuring data integrity is maintained without impacting overall access speed.
2Reliability
If all memory cells are discharged frequently to prevent corruption, then data retention is improved, but power consumption increases
Solution Approach 1:
The patent divides the memory array into multiple isolated sections that can be discharged independently. Instead of discharging all memory cells simultaneously, only specific isolated sections are targeted for discharge operations. This segmentation allows the system to maintain data retention in discharged sections while avoiding the power consumption penalty of discharging the entire memory array.
Solution Approach 2:
The patent performs discharge operations on only a subset of memory cells (those in isolated sections) rather than all cells. This partial action is sufficient to prevent corruption in the isolated sections while significantly reducing the overall power consumption compared to a full-array discharge approach.
3Use of energy by moving object
If isolation sections are implemented to reduce power consumption, then energy efficiency is improved, but device complexity increases due to additional control lines
Solution Approach 1:
The patent makes existing access lines serve multiple functions: they are used both for normal data access operations and for discharge operations in isolated sections. By reusing the same physical infrastructure for different purposes, the system achieves energy efficiency through selective discharge without adding the complexity of dedicated control lines for isolation.
Solution Approach 2:
The patent uses the existing access line infrastructure to perform discharge operations on isolated sections without requiring additional specialized control lines. The system leverages its own existing resources (access lines) to maintain isolated sections, thereby achieving energy efficiency while avoiding increased device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively prevents cell corruption and reduces power consumption by isolating and discharging memory cells, thereby improving data retention and energy efficiency in memory arrays.
Implementation Method 1
a voltage is applied to memory cell 105-a, causing capacitor 205 to discharge
Data Source
AI summary
Methods, systems, and devices for cell voltage accumulation discharge are described. One or more sections of a bank of ferroelectric memory cells may be coupled with one or more access lines. By activating one or more switching components, one or more sections (that may include a memory array and/or a driver) of memory cells may be isolated. When isolated, a voltage may be applied across an access line associated with the section to activate an access device of each memory cell. By activating a switching component of a respective memory cell, a capacitor of the memory cell may be discharged and then the isolated section may be coupled with the plurality of access lines.