Ferroelectric Programmable Diode Memory With Tungsten Plug Electrode
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Traditional ferroelectric memory integration architecture requires a large device area and is destructive for reading, limiting high-density integration and storage density.
Innovation Solution
A method for preparing a programmable diode using a tungsten plug as a lower electrode, depositing a ferroelectric film, and patterning an upper electrode, which reduces process complexity and integrates with a transistor to form a 1T1D structure for improved storage density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a 1T1C structure is used for ferroelectric memory, then the memory can store information based on charge change, but the device area becomes too large for high-density integration
Solution Approach 1:
The patent merges the lower electrode function with the transistor source/drain structure, eliminating the need for a separate lower electrode. The ferroelectric capacitor is integrated directly on top of the transistor, combining storage and logic functions in a compact 1T1D structure that reduces device area while maintaining information storage capability
Solution Approach 2:
The patent transitions from planar integration to vertical stacking by placing the ferroelectric capacitor vertically above the transistor. This three-dimensional arrangement allows the device to maintain small footprint area while providing sufficient storage capacity through vertical space utilization
2Reliability
If a 1T1C structure is used for ferroelectric memory, then charge-based storage is achieved, but the reading becomes destructive
Solution Approach 1:
The patent changes the storage mechanism from charge-based (1T1C) to polarization-based (1T1D) by introducing a ferroelectric layer. The ferroelectric polarization state can be non-destructively read through tunneling current measurement, allowing the reading operation to preserve the stored information while maintaining reliable storage functionality
3Reliability
If a standard lower electrode structure is used, then the electrostatic control is adequate, but the process complexity increases and integration density decreases
Solution Approach 1:
The patent merges the lower electrode with the transistor source/drain region, eliminating the need for a separate lower electrode structure. This integration simplifies the fabrication process by reducing the number of deposition and patterning steps while maintaining adequate electrostatic control for the ferroelectric capacitor
Solution Approach 2:
The transistor source/drain structure serves dual functions: as the active transistor component and as the lower electrode for the ferroelectric capacitor. This multi-functionality reduces overall device complexity and increases integration density by eliminating redundant structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enables a smaller device area and higher storage density by eliminating the need for a separate lower electrode and utilizing the tungsten plug as the lower electrode, enhancing memory storage capacity.
Implementation Method 1
filling the hole with tungsten by plasma-enhanced chemical vapor deposition
Implementation Method 2
The ferroelectric film is prepared by one of electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition or sputtering
Implementation Method 3
The upper electrode is prepared by one of electron beam evaporation, chemical vapor deposition, pulsed laser deposition, atomic layer deposition or sputtering
Data Source
AI summary
A method of preparing a programmable diode, including: forming a tungsten plug by a standard CMOS process; taking the tungsten plug as a lower electrode and depositing a functional layer material such as a ferroelectric film on the tungsten plug; depositing an upper electrode on the functional layer material; and patterning the upper electrode and a functional layer to complete a preparation of the programmable diode. The present disclosure further discloses a ferroelectric memory of a programmable diode prepared by the method of preparing a programmable diode. The method of preparing a programmable diode does not require growing a lower electrode and reduces a complexity of the process. The ferroelectric memory includes a transistor and a programmable diode. This design stores information according to different polarities of the diode, thus a device area may be further reduced and a storage density may be improved.