Ferroelectric 3D Flash Memory ISPP Voltage Adjustment

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Solution Overview

Problem

The development of an effective operation method for three-dimensional flash memory using a ferroelectric-based data storage pattern has been insufficient, necessitating a solution for adjusting program voltages to achieve stable program states.

Innovation Solution

A program operation method for three-dimensional flash memory that adjusts the program voltage using an incremental step pulse programming (ISPP) method, applying different voltage values to selected and unselected word lines to achieve multi-leveling and stability in program states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a single layer of ferroelectric material is used as data storage pattern, then cross-sectional area of memory cell string is reduced for integration, but program operation stability is insufficient

Engineering Contradiction:

Improvecross-sectional area of memory cell stringVSAvoidprogram operation stability

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

The patent applies incremental step pulse programming (ISPP) method that gradually increases program voltage in discrete steps (e.g., from 8V to 12V in 0.5V increments) to precisely control the polarization state of the ferroelectric material. This parameter change approach enables stable program operation while maintaining the reduced cross-sectional area structure, resolving the contradiction between miniaturization and operational stability.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If incremental step pulse programming method is applied to adjust program voltage, then program operation stability is improved, but operation complexity increases

Engineering Contradiction:

Improveprogram operation stabilityVSAvoidoperation complexity

Core Design Contradiction:

ReliabilityVSEase of operation

Solution Approach 1:

The ISPP method incorporates automatic verification and feedback mechanisms where each voltage step is followed by a verification read operation. The system automatically determines whether to proceed to the next voltage step based on verification results, eliminating the need for manual intervention and simplifying the overall operation process despite the multiple voltage steps involved.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent implements a feedback loop where program verification is performed at each voltage step, and the verification result determines the next action. If the verification fails, the system adjusts the program voltage and retries; if successful, it proceeds to the next step. This feedback mechanism ensures stability while managing complexity through automated control.

Inventive Principle:

Principle #23Feedback

3Reliability

If pass voltage is applied to unselected word lines, then program state stability is achieved, but interference with selected word line increases

Engineering Contradiction:

Improveprogram state stabilityVSAvoidinterference with selected word line

Core Design Contradiction:

ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies different voltage levels to different word lines based on their selection status. Unselected word lines receive a controlled pass voltage (e.g., 4V) that is sufficient to maintain their program state but low enough to avoid interfering with the selected word line's programming operation. This localized voltage assignment resolves the contradiction between stability and interference.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed method enables efficient program operations in three-dimensional flash memory with ferroelectric-based data storage patterns by adjusting program voltages, thereby improving the stability and multi-leveling capabilities of the memory cells.

Implementation Method 1

a ferroelectric-based data storage pattern formed to cover an outer wall of the vertical channel pattern

Methodology Applied

Scientific EffectFerroelectric effect:

Implementation Method 2

A flash memory device is an electrically erasable programmable read only memory (EEPROM) that controls input and output of data electrically by Fowler-Nordheim ((F-N) tunneling or hot electron injection

Methodology Applied

Scientific EffectFowler-Nordheim tunneling:

Implementation Method 3

Methodology Applied

Scientific EffectHot electron injection:

Data Source

PatentUS20250087272A1Method for operating ferroelectric-based three-dimensional flash memory including data storage pattern

Publication Date: 2025.03.13 SAMSUNG ELECTRONICS CO LTD

AI summary

Disclosed is a method for operating ferroelectric-based three-dimensional flash memory including a data storage pattern. According to one embodiment, a program operation method of three-dimensional flash memory may comprise the steps of: adjusting the value of a program voltage to be applied to a selected word line corresponding to a target memory cell that is the target of a program operation among word lines on the basis of the slope at which a voltage pulse increases in an incremental step pulse programming (ISPP) method; applying the adjusted value of the program voltage to the selected word line; applying a pass voltage to each of the non-selected word lines excluding the selected word line among the word lines; and performing a program operation on the target memory cell in response to the adjusted value of the program voltage being applied to the selected word line and the pass voltage being applied to each of the non-selected word lines.