Ferroelectric Gate Insulator Memory FETs for Density and Speed

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Solution Overview

Problem

Current memory devices face challenges in achieving high density and speed while minimizing power consumption, with existing technologies limiting the integrability and scalability of memory and logic field-effect transistors on semiconductor substrates.

Innovation Solution

The use of ferroelectric materials as gate insulators in memory field-effect transistors, differing from dielectric materials used in logic FETs, allows for the formation of denser and faster memory cells with a unique gate insulator structure that is scalable and compatible with logic FET manufacturing processes, enabling simultaneous integration and reducing fabrication costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If DRAM structure with one transistor and one capacitor is used, then density is improved, but performance speed and power consumption are worsened

Engineering Contradiction:
ImprovedensityVSAvoidperformance speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent changes the material parameter of the gate insulator from conventional dielectric material to ferroelectric material. This parameter change enables the memory cell to achieve both high density (like DRAM with 1T1C structure) and fast performance (like SRAM) by utilizing the ferroelectric effect for rapid switching and low power consumption, thereby resolving the contradiction between density and performance speed

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structure by integrating ferroelectric gate insulator with conventional semiconductor materials. The ferroelectric material layer is formed between the gate electrode and the semiconductor substrate, creating a composite structure that combines the advantages of both ferroelectric properties (fast switching, low power) and conventional semiconductor processing, thus achieving both high density and fast performance

Inventive Principle:
Principle #40Composite materials

2Speed

If SRAM structure with six transistors is used, then performance speed and power consumption are improved, but density is worsened

Engineering Contradiction:
Improveperformance speedVSAvoiddensity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

By changing the gate insulator material to ferroelectric material, the patent enables a simplified memory cell structure that requires fewer transistors while maintaining fast performance and low power consumption. The ferroelectric effect provides non-volatile memory functionality and rapid switching, allowing the device to achieve SRAM-like performance with DRAM-like density

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The ferroelectric gate insulator serves multiple functions simultaneously: it provides the gate dielectric function, enables non-volatile memory storage through ferroelectric polarization, and facilitates fast switching. This multi-functionality allows the memory cell to achieve high performance and low power consumption without requiring the complex six-transistor SRAM structure, thereby improving density

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If different gate insulator materials are used for memory and logic FETs, then memory performance is improved, but manufacturing complexity is worsened

Engineering Contradiction:
Improvememory performanceVSAvoidmanufacturing complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the manufacturing process into distinct stages: first forming the ferroelectric gate insulator for memory FETs in specific regions, then forming dielectric gate insulators for logic FETs in other regions. This segmentation allows different material systems to be optimized for their respective functions while using a unified overall manufacturing flow, reducing the complexity impact of using multiple materials

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by using ferroelectric material specifically in memory FET regions and dielectric material in logic FET regions. This localized material selection allows each region to have the optimal material properties for its function while the manufacturing process maintains compatibility across the entire substrate, thereby improving memory performance without significantly increasing overall manufacturing complexity

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the production of denser and faster memory devices with improved scalability, achieving higher performance and density than conventional memory cells, while maintaining reliable operation and reducing manufacturing complexities.

Implementation Method 1

a ferroelectric gate insulator of a memory field-effect transistor... The gate insulator to separate a bottom surface of the gate conductor and the substrate

Methodology Applied
Scientific EffectFerroelectric effect:

Data Source

PatentUS11004868B2Memory field-effect transistors and methods of manufacturing the same
Publication Date: 2021.05.11 INTEL CORP
  • US11004868B2 patent drawing
  • US11004868B2 patent drawing
  • US11004868B2 patent drawing

AI summary

Memory field-effect transistors and methods of manufacturing the same are disclosed. An example apparatus includes a semiconductor substrate and a ferroelectric gate insulator of a memory field-effect transistor formed within a trench having walls defined by spacers and a base defined by the semiconductor substrate. The apparatus further includes a gate conductor formed on the ferroelectric gate insulator. The ferroelectric gate insulator is to separate a bottom surface of the gate conductor and the substrate.