Ferroelectric Gate Structure for Threshold Voltage Control

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current semiconductor technologies face challenges in controlling the threshold voltage of advanced semiconductor devices at deep sub-micron scales, particularly in flash memory technologies, due to difficulties in maintaining precise electrical conductivity and adjusting the threshold voltage for optimal power consumption and performance.

Innovation Solution

A semiconductor device structure with a ferroelectric gate structure is developed, comprising a gate electrode and a ferroelectric material layer, where a buried insulating material is formed between the active semiconductor material and the base substrate, allowing for the adjustment of the threshold voltage by applying specific voltage levels to the source/drain regions and a back bias voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional gate structures are used in deep sub-micron devices, then manufacturing is simpler, but threshold voltage control precision deteriorates

Engineering Contradiction:
Improvethreshold voltage control precisionVSAvoidgate structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent introduces a ferroelectric material layer in the gate structure that enables non-volatile threshold voltage control through its ferroelectric polarization state. By changing the material composition and electrical state of the gate dielectric from conventional paraelectric materials, the system achieves precise threshold voltage tuning without requiring complex multi-layer dielectric stacks or extensive doping profiles, thus improving control precision while maintaining manageable device complexity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The gate structure employs a composite material system comprising a ferroelectric material layer (such as hafnium oxide-based ferroelectric materials) combined with conventional gate electrode materials. This composite approach leverages the unique properties of ferroelectric materials to achieve non-volatile threshold voltage control, resolving the contradiction by providing precise electrical characteristics through material composition rather than structural complexity

Inventive Principle:
Principle #40Composite materials

2Productivity

If device dimensions are scaled down to deep sub-micron regime, then circuit density increases, but threshold voltage control becomes difficult

Engineering Contradiction:
Improvecircuit densityVSAvoidthreshold voltage control precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

By scaling down device dimensions while incorporating ferroelectric material in the gate structure, the patent maintains precise threshold voltage control through the material's inherent ferroelectric properties. The ferroelectric polarization provides strong electric field control that compensates for the reduced device dimensions, enabling accurate threshold voltage tuning in deep sub-micron regime without sacrificing control precision despite the density increase

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The ferroelectric gate structure provides dynamic and reversible threshold voltage control through electric field application. The ability to switch between different polarization states allows for flexible threshold voltage adjustment in scaled devices, maintaining manufacturing precision even as circuit density increases in the deep sub-micron regime

Inventive Principle:
Principle #15Dynamics

3Use of energy by moving object

If threshold voltage is adjusted for optimal performance, then power consumption decreases, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidfabrication process complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The ferroelectric material layer enables threshold voltage adjustment through its polarization state, which can be set during fabrication and provides non-volatile memory of the electrical characteristics. This approach achieves optimal power consumption by enabling precise threshold voltage control without requiring complex post-fabrication tuning processes or additional control circuitry, thus reducing power while maintaining manageable fabrication complexity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The threshold voltage characteristics are predetermined during the gate structure fabrication by controlling the ferroelectric material deposition and polarization state. This preliminary action during manufacturing eliminates the need for complex post-fabrication threshold voltage tuning, achieving optimal power consumption while keeping the overall device complexity manageable through upfront parameter optimization

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables precise control and tuning of the threshold voltage, improving the performance and power efficiency of semiconductor devices, particularly in flash memory technologies, by utilizing a ferroelectric gate structure that allows for non-volatile memory storage.

Implementation Method 1

a ferroelectric gate structure disposed over the active semiconductor material in an active region of the substrate structure, the ferroelectric gate structure comprising a gate electrode and a ferroelectric material layer

Methodology Applied
Scientific EffectFerroelectricity:

Data Source

PatentUS10084057B2NVM device in SOI technology and method of fabricating an according device
Publication Date: 2018.09.25 GLOBALFOUNDRIES US INC
  • US10084057B2 patent drawing
  • US10084057B2 patent drawing
  • US10084057B2 patent drawing

AI summary

The present disclosure provides in one aspect a semiconductor device including a substrate structure comprising an active semiconductor material formed over a base substrate and a buried insulating material formed between the active semiconductor material and the base substrate, a ferroelectric gate structure disposed over the active semiconductor material in an active region of the substrate structure, the ferroelectric gate structure comprising a gate electrode and a ferroelectric material layer, and a contact region formed in the base substrate under the ferroelectric gate structure.