Ferroelectric Memory Cell for Neural Network Weight Storage

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Solution Overview

Problem

Current semiconductor devices lack efficient methods for storing and processing weight data for neural networks, which is crucial for computational operations based on neural networks, as they require precise control of threshold voltages and polarization directions in ferroelectric layers.

Innovation Solution

A semiconductor device design featuring a cell region with memory cells that include ferroelectric layers and gate electrode layers, where the polarization direction and degree of polarization can be adjusted to change the threshold voltage, allowing for the storage and processing of weight data by adjusting the alignment of electric dipoles in the ferroelectric layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional semiconductor devices are used for storing weight data, then the device structure is simple, but the ability to store and process neural network weight data efficiently is insufficient

Engineering Contradiction:
Improveability to store and process weight dataVSAvoiddevice structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory device is designed to perform multiple functions: storing weight data for neural networks, performing computational operations (multiplication and accumulation), and maintaining data without continuous power. The ferroelectric layer serves both as a memory element for data storage and as a component that enables computational functionality through its polarization properties, allowing the same device structure to handle both storage and processing tasks.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The device employs a composite structure combining ferroelectric material layers with semiconductor components. The ferroelectric layer is integrated with semiconductor layers to create a hybrid structure that leverages the non-volatile memory characteristics of ferroelectric materials while maintaining the electronic functionality of semiconductor devices, enabling efficient weight data storage and processing.

Inventive Principle:
Principle #40Composite materials

2Productivity

If ferroelectric layers are used to store weight data, then the storage efficiency is improved, but the control of threshold voltages and polarization directions becomes complex

Engineering Contradiction:
Improvestorage efficiencyVSAvoidcontrol of threshold voltages and polarization
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The device applies different voltage polarities to different regions of the ferroelectric layer to store different weight values. By controlling the polarization direction (positive or negative) in specific local areas, the device can represent different numerical values, enabling efficient weight data storage while maintaining manageable control complexity through localized property assignment.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The device controls the ferroelectric layer by changing the polarization state (direction and degree) in response to applied voltages. By adjusting the voltage polarity and magnitude, the device can set the ferroelectric layer to different polarization states that correspond to different weight values, enabling flexible and efficient data storage without requiring complex structural modifications.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If multiple memory cells are arranged to store weight data, then the data capacity is increased, but the area occupied on the substrate increases

Engineering Contradiction:
Improvedata capacityVSAvoidsubstrate area
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The device merges multiple functional capabilities into a single memory cell structure. Each memory cell not only stores weight data but also performs computational operations (multiplication and accumulation) directly within the same structure. This integration of storage and computation functions reduces the need for separate processing circuits, thereby decreasing the overall substrate area required for a given data capacity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The device utilizes vertical stacking of layers (ferroelectric layer, semiconductor layers, electrodes) to increase data capacity without proportionally increasing the horizontal substrate area. By organizing memory cells in a three-dimensional layered structure, the device achieves higher storage density while maintaining a compact footprint on the substrate.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables efficient storage and computation of weight data for neural networks by allowing precise control of threshold voltages, enhancing the accuracy and efficiency of neural network operations.

Implementation Method 1

Ferroelectrics are materials having ferroelectricity maintaining polarization according to the alignment direction of electric dipoles therein

Methodology Applied
Scientific EffectFerroelectricity:

Implementation Method 2

maintaining polarization according to the alignment direction of electric dipoles therein

Methodology Applied
Scientific EffectPolarization: Polarisation

Data Source

PatentUS20230380176A1Semiconductor device
Publication Date: 2023.11.23 SAMSUNG ELECTRONICS CO LTD
  • US20230380176A1 patent drawing
  • US20230380176A1 patent drawing
  • US20230380176A1 patent drawing

AI summary

A semiconductor device includes a cell region including a plurality of memory cells, and a peripheral circuit region controlling the plurality of memory cells. Each of the plurality of memory cells includes a first active region and a second active region adjacent to each other, a first channel layer and a second channel layer extending in the first direction, connected to the first active region and the second active region, and separated from each other in the third direction, a first ferroelectric layer and a first gate electrode layer sequentially provided on the first channel layer, and a second ferroelectric layer and a second gate electrode layer sequentially provided on the second channel layer. The first gate electrode layer and the second gate electrode layer are separated from each other in the third direction.