Ferroelectric Memory Cell Non-Destructive Read and Write Endurance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Ferroelectric memory devices face challenges in achieving non-destructive read operations and long endurance of write operations, limiting their performance due to issues such as data damage during read operations and excessive voltage generation during writing, which affects their reliability and efficiency.
Innovation Solution
A memory device based on a ferroelectric capacitor is designed with a control unit and memory cells that utilize a ferroelectric capacitor to implement non-destructive reading and longer endurance of write operations by controlling voltage levels and switch states to maintain or change the polarized state of the ferroelectric capacitor, ensuring data integrity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If FeRAM read operation writes determined data into the memory device, then data can be read, but the original data is damaged
Solution Approach 1:
The memory cell is segmented into two separate capacitors: a first capacitor (ferroelectric) for non-destructive data storage and a second capacitor for read operation. This segmentation allows the read operation to access the second capacitor without affecting the data stored in the first capacitor, thereby enabling non-destructive reading.
Solution Approach 2:
A transfer transistor is introduced as an intermediary between the two capacitors. This transfer transistor controls the transfer of data from the first capacitor to the second capacitor, allowing the read operation to work on a copy of the data while the original remains intact in the first capacitor.
2Productivity
If FeFET write operation generates excessive voltage inside the memory, then data can be written, but the endurance of the write operation becomes short
Solution Approach 1:
The patent changes the voltage parameters during write operations by using a two-stage voltage application process. First, a first write voltage is applied to the second word line, then a second write voltage (lower than the first) is applied. This parameter change allows effective data writing while reducing the excessive voltage that would otherwise damage the ferroelectric capacitor and limit write endurance.
3Productivity
If CMOS technology continues to progress, then memory performance is improved, but current leakage problem becomes more serious and power consumption increases
Solution Approach 1:
The patent utilizes the ferroelectric phase transition properties to achieve non-volatile memory storage. The ferroelectric material can maintain its polarized state without continuous power supply, enabling data to be retained without power consumption. This phase transition characteristic allows the memory to achieve both high performance and low power consumption by eliminating the need for continuous refreshing that plagues conventional volatile memory.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables non-destructive reading and prolonged endurance of write operations, enhancing the reliability and performance of ferroelectric memory devices by avoiding data damage during read operations and reducing excessive voltage generation, thus supporting multiple million reads per written data.
Implementation Method 1
at least one of the first capacitor and the second capacitor is a ferroelectric capacitor
Data Source
AI summary
The present disclosure relates to a memory device based on a ferroelectric capacitor, which includes a control unit for writing data into a memory cell or reading data from the memory cell and a plurality of memory cells arranged in an array; each memory cell includes an external interface, a first switch, a transistor, a first capacitor and a second capacitor, wherein at least one of the first capacitor and the second capacitor is a ferroelectric capacitor; the first switch has a first port connected with a first word line, a second port connected with a bit line, and a third port connected with one end of the first capacitor; and the transistor has a gate electrode connected with another end of the first capacitor and one end of the second capacitor, a source electrode connected with a first read terminal, and a drain electrode connected with a second read terminal, wherein another end of the second capacitor is connected with a second word line. According to the present disclosure, a polarized state of the ferroelectric capacitor in the memory cell is held or changed based on hysteresis characteristics of the ferroelectric capacitor, and the control unit is used to write data into or read data from the memory cell, which can implement non-destructive reading of data and longer endurance of a write operation.