Ferroelectric Non-Volatile Memory Cell Threshold Voltage Stability

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Solution Overview

Problem

Current non-volatile semiconductor memory technologies face challenges in efficiently programming and erasing memory cells, particularly in maintaining threshold voltage stability due to limitations in charge storage and polarization switching mechanisms.

Innovation Solution

Incorporating a ferroelectric dielectric blocking layer, such as hafnium oxide, between the charge storage region and the channel in non-volatile memory cells, which enables polarization switching and enhances threshold voltage control through electron tunneling and polarization switching effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional charge storage regions are used in non-volatile memory cells, then data storage capability is provided, but threshold voltage stability deteriorates due to limitations in charge storage and polarization switching mechanisms

Engineering Contradiction:
Improvethreshold voltage stabilityVSAvoidprogramming and erasing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent employs a composite structure combining a ferroelectric dielectric blocking layer (e.g., hafnium oxide) with a charge storage region. This composite material approach enables the blocking layer to provide polarization switching capability while the charge storage region maintains charge, collectively achieving both threshold voltage stability and improved programming/erasing efficiency through the synergistic interaction of the two materials.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent utilizes the ferroelectric properties of the blocking layer to enable rapid polarization switching between stable states. This parameter change in the dielectric's polarization state allows for efficient programming and erasing operations while maintaining stable threshold voltage levels, directly addressing the contradiction between reliability and productivity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If ferroelectric dielectric blocking layer is incorporated, then threshold voltage control is enhanced through polarization switching, but device structure complexity increases

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidmemory cell structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The ferroelectric dielectric blocking layer serves multiple functions simultaneously: it acts as a blocking layer to prevent charge leakage, provides polarization switching for threshold voltage control, and enables non-volatile data storage. This multi-functionality reduces the need for additional separate components, thereby limiting the increase in device complexity while achieving enhanced threshold voltage control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent extracts the polarization switching function from a separate control mechanism and integrates it directly into the blocking layer itself. By incorporating the ferroelectric dielectric with switching capability directly in the blocking layer position, the design eliminates the need for additional polarization control structures, thus enhancing threshold voltage control without proportionally increasing device complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

3Productivity

If ferroelectric material is used for blocking layer, then programming and erasing efficiency is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improveprogramming and erasing efficiencyVSAvoidfabrication process
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent utilizes phase change parameters of the ferroelectric material (e.g., crystalline phase transitions in hafnium oxide) to achieve stable polarization states during programming and erasing. By controlling temperature and electric field parameters during fabrication and operation, the process leverages the material's inherent phase transition properties to enable efficient programming/erasing without requiring excessively complex manufacturing steps.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent replaces traditional charge-based programming mechanisms with electric field-induced polarization switching in the ferroelectric material. This substitution allows for more efficient and controlled programming and erasing operations through electrical fields alone, simplifying the overall manufacturing process by eliminating the need for more complex charge injection or physical modification mechanisms.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution improves the programming and erasing efficiency of memory cells by stabilizing threshold voltage, allowing for reliable data storage and retrieval in both 2D and 3D NAND structures.

Implementation Method 1

enables polarization switching and enhances threshold voltage control through electron tunneling and polarization switching effects

Methodology Applied
Scientific EffectPolarization switching: Polarisation

Implementation Method 2

enhances threshold voltage control through electron tunneling and polarization switching effects

Methodology Applied
Scientific EffectElectron tunneling:

Data Source

PatentUS10453862B1Ferroelectric non-volatile memory
Publication Date: 2019.10.22 SANDISK TECHNOLOGIES LLC
  • US10453862B1 patent drawing
  • US10453862B1 patent drawing
  • US10453862B1 patent drawing

AI summary

A memory cell is provided that includes a control gate, a tunneling layer, a charge storage region, a blocking layer including a ferroelectric material, a semiconductor channel, and a source region and a drain region each disposed adjacent the semiconductor channel. The tunneling layer is disposed between the control gate and the charge storage region, the charge storage region is disposed between the tunneling layer and the blocking layer, and the blocking layer is disposed above the semiconductor channel.