Ferroelectric Memory Circuit Current Integrator Readout

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Solution Overview

Problem

Existing memory cell circuits face challenges in efficiently reading out memory cells, particularly in reducing parasitic capacitance on bit-lines and eliminating dielectric current to accurately sense switching charge.

Innovation Solution

The implementation of a current integrator circuit to read out ferroelectric capacitors, which includes reducing parasitic capacitance, applying a compensation mechanism to eliminate dielectric current, and positioning the sense circuit below the FeCap array to minimize area consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional memory cell circuit is used to read out memory cells, then the reading operation can be performed, but parasitic capacitance on bit-lines increases and dielectric current interferes with accurate sensing

Engineering Contradiction:

Improveaccuracy of memory state determinationVSAvoidparasitic capacitance and dielectric current

Core Design Contradiction:

Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent segments the readout process into distinct phases: a first readout phase where the memory cell is read without compensation, and a second readout phase where compensation is applied. This temporal segmentation allows the circuit to handle different operational requirements separately, improving measurement precision by eliminating dielectric current interference in the compensated phase while maintaining operational simplicity.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a compensation mechanism that acts as an intermediary to cancel out dielectric current. By applying a compensation voltage that generates an opposite dielectric current, the harmful dielectric current is neutralized, allowing accurate sensing of the memory cell state without interference from the dielectric current.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Area of stationary object

If the sense circuit is positioned above the FeCap array, then reading operation is simplified, but area consumption increases

Engineering Contradiction:

Improvearea consumption of sense circuitVSAvoidcomplexity of readout operation

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent repositions the sense circuit from a conventional location above the FeCap array to a location below the FeCap array, utilizing the vertical dimension for circuit placement. This spatial reconfiguration reduces the horizontal area consumption while the additional compensation mechanism manages the increased operational complexity through systematic voltage application sequences.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Measurement precision

If compensation voltage is applied to eliminate dielectric current, then measurement accuracy improves, but device complexity increases

Engineering Contradiction:

Improveaccuracy of switching charge sensingVSAvoidcomplexity of compensation mechanism

Core Design Contradiction:

Measurement precisionVSDevice complexity

Solution Approach 1:

The patent implements periodic action by executing readout operations in alternating phases: first readout without compensation, then second readout with compensation. This periodic alternation between compensated and non-compensated readouts allows the system to manage complexity through rhythmical operation while achieving high measurement accuracy during the compensated phases.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The patent changes the voltage parameter dynamically by applying different voltages during different readout phases. During the first readout, a standard readout voltage is applied, while during the second readout, a compensation voltage is added to counteract dielectric current. This parameter change approach enables accurate measurement without requiring a permanently complex circuit structure.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient readout operations by isolating the switching charge current from dielectric current, thereby improving the dynamic range of the output voltage and enhancing the accuracy of memory state determination.

Implementation Method 1

A memory state of the ferroelectric capacitor may be switchable between a first memory state and a second memory state

Methodology Applied

Scientific EffectFerroelectric effect:

Implementation Method 2

the sense circuit is configured to receive an electrical current output by the memory cell in response to the readout voltage

Methodology Applied

Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS12334128B2Ferroelectric memory circuit and reading method thereof

Publication Date: 2025.06.17 FERROELECTRIC MEMORY GMBH

AI summary

A ferroelectric memory circuit (100) includes: a memory cell (102), wherein a memory state (102s) of the memory cell (102) is switchable between a first memory state and a second memory state, the memory cell (102) further configured to output an electrical current (101) in response to receiving a readout voltage (103); and a sense circuit (104) configured to output an output voltage (105) based on the result of integrating the electrical current (101) output by the memory cell (102), wherein the output voltage (105) represents whether the memory state (102s) is the first memory state or the second memory state.