Ferroelectric Memory Gate Structures for High Endurance
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Solution Overview
Problem
Current semiconductor memory technologies face challenges in achieving high-density, reliable, and low-thermal-budget integration of ferroelectric random access memory (FeRAM) arrays due to limitations in fatigue performance and endurance of ferroelectric materials.
Innovation Solution
Incorporating a rare earth metal with an ionic radius larger than hafnium into the ferroelectric material, such as lanthanum, yttrium, gadolinium, or cerium, allows for an orthorhombic crystalline structure at low temperatures, enhancing the composition range and stability of the ferroelectric layer, which improves the fatigue performance and endurance of the FeRAM array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ferroelectric materials are used in FeRAM arrays, then the basic memory function is achieved, but the fatigue performance and endurance are limited
Solution Approach 1:
The patent modifies the compositional parameters of the ferroelectric material by incorporating rare earth metals (lanthanum, yttrium, gadolinium, or cerium) at specific concentrations (0.1-10 atomic percent). This parameter change transforms the material properties to achieve superior endurance exceeding 10^8 polarization cycles while maintaining the orthorhombic crystalline structure necessary for ferroelectric functionality.
Solution Approach 2:
The patent creates a composite ferroelectric material system by combining conventional ferroelectric materials (such as hafnium oxide, lead zirconate titanate, or barium zirconate titanate) with rare earth metal dopants. This composite approach leverages the beneficial properties of both components: the base material provides ferroelectric functionality while the rare earth metal enhances stability and endurance through lattice reinforcement and defect passivation.
2Productivity
If high-density integration is pursued, then memory capacity increases, but thermal budget constraints are exacerbated
Solution Approach 1:
The patent utilizes parameter changes in the crystallization process, specifically controlling the cooling rate and annealing temperature to stabilize the orthorhombic phase at lower temperatures. The rare earth metal dopants lower the critical crystallization temperature, enabling high-density integration processes to be conducted within reduced thermal budgets while maintaining material quality.
3Stability of the object's composition
If ferroelectric material stability is improved, then fatigue performance increases, but manufacturing complexity increases
Solution Approach 1:
The patent applies preliminary action by incorporating the rare earth metal dopants during the initial deposition or crystallization process rather than requiring subsequent complex treatment steps. The dopants are introduced in advance into the ferroelectric layer structure, where they automatically provide stability enhancement and fatigue resistance during standard manufacturing processes, eliminating the need for additional specialized processing steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly improves the reliability and manufacturing ease of FeRAM arrays by increasing endurance by at least ten times, enabling 108 polarization cycles without significant degradation and facilitating low-thermal-budget back-end-of-line integration.
Implementation Method 1
Incorporating a rare earth metal with an ionic radius larger than hafnium into the ferroelectric material, such as lanthanum, yttrium, gadolinium, or cerium, allows for an orthorhombic crystalline structure at low temperatures
Data Source
AI summary
A memory cell includes a thin film transistor over a semiconductor substrate. The thin film transistor comprising: a ferroelectric (FE) material contacting a word line, the FE material being a hafnium-comprising compound, and the hafnium-comprising compound comprising a rare earth metal; and an oxide semiconductor (OS) layer contacting a source line and a bit line, wherein the FE material is disposed between the OS layer and the word line.


