Ferroelectric Memory Cell With Series Select Gate Transistor
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Solution Overview
Problem
Ferroelectric memory devices face challenges in reducing disturb during operation, which affects the reliability and accuracy of data storage due to the inherent properties of ferroelectric materials.
Innovation Solution
The implementation of a series connected select gate transistor in ferroelectric memory devices, where a first field effect transistor with a non-ferroelectric gate dielectric is connected to a second field effect transistor with a ferroelectric gate dielectric, reduces disturb by optimizing the gate dielectric structures and electrode configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ferroelectric memory device uses a single field effect transistor with a ferroelectric gate dielectric, then the device can store information using the dipole moment orientations, but the inherent properties of ferroelectric materials cause disturb during operation that reduces reliability
Solution Approach 1:
The patent divides the memory device into two separate field effect transistors: a first FET with a non-ferroelectric gate dielectric and a second FET with a ferroelectric gate dielectric. This segmentation isolates the ferroelectric material to only the second transistor, preventing its inherent properties from causing disturb during operations in the first transistor, thereby improving reliability while maintaining data storage functionality.
Solution Approach 2:
The first field effect transistor with non-ferroelectric gate dielectric acts as an intermediary between the control circuitry and the ferroelectric memory transistor. This intermediary structure mediates the control signals and prevents direct interaction between the control circuits and the ferroelectric material, reducing disturb effects during read, write, and erase operations.
2Reliability
If the ferroelectric material is used directly as the gate dielectric in a field effect transistor, then the dipole moment can be programmed to store information, but the device complexity increases due to the need for series connected transistors and optimized gate structures
Solution Approach 1:
The patent merges the functions of control and memory storage into a unified structure where the first FET (with non-ferroelectric gate) and second FET (with ferroelectric gate) are series-connected and share common source and drain regions. This merging reduces the overall device footprint and simplifies the layout while maintaining the benefits of reduced disturb and improved reliability.
Solution Approach 2:
The first field effect transistor with non-ferroelectric gate dielectric serves multiple functions: it acts as a select gate for controlling access to the memory cell, provides signal amplification, and prevents disturb during operations. This multi-functionality reduces the need for additional separate control structures, thereby managing device complexity while improving data retention.
3Reliability
If a trench structure is used to position the gate dielectric and gate electrode, then the gate control is improved, but the manufacturing precision requirements increase due to the need for precise trench formation and material stacking
Solution Approach 1:
The trench structure is formed preliminarily before depositing the gate dielectric and gate electrode materials. This preliminary action allows for precise definition of the gate region boundaries and ensures proper alignment of subsequent layers. The trench serves as a pre-established template that guides the formation of the gate stack, reducing the need for high precision during later manufacturing steps.
Solution Approach 2:
The gate dielectric and gate electrode are nested within the previously formed trench structure. This nesting approach ensures that the gate components are precisely positioned within the confines of the trench, achieving good gate control without requiring extremely high manufacturing precision for each individual layer, as the trench provides a physical constraint and alignment reference.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the operational stability and data retention of ferroelectric memory devices by minimizing disturbances during read, write, and erase operations, thereby improving the overall performance and reliability of the memory storage.
Implementation Method 1
A ferroelectric material refers to a material that displays spontaneous polarization of electrical charges in the absence of an applied electric field. The net polarization P of electrical charges within the ferroelectric material is non-zero in the minimum energy state.
Implementation Method 2
Polarization P of a ferroelectric material as a function of an applied voltage V thereacross displays hysteresis.
Implementation Method 3
The orientation of the dipole moment can be detected by measuring electrical current passing through a semiconductor channel provided adjacent to the ferroelectric material in a field effect transistor ferroelectric memory device.
Data Source
AI summary
A ferroelectric memory unit cell includes a series connection of select gate transistor that turns the ferroelectric memory unit cell on and off, and a ferroelectric memory transistor. Data is stored in a ferroelectric material layer of the ferroelectric memory transistor. The ferroelectric memory unit cell may be a planar structure in which both transistors are planar transistors with horizontal current directions. In this case, the gate electrode of the access transistor can be formed as a buried conductive line. Alternatively, the ferroelectric memory unit cell may include a vertical stack of vertical semiconductor channels.