Ferroelectric NVSRAM Cell Integrating SRAM and F-RAM

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Solution Overview

Problem

Conventional SRAM is volatile and loses data when power is removed, necessitating the development of a non-volatile memory solution that combines high-speed access with data retention capabilities.

Innovation Solution

A ferroelectric capacitor-based nvSRAM cell that integrates a volatile SRAM cell with a non-volatile memory cell, utilizing ferroelectric capacitors to store data even when power is unavailable, eliminating the need for external capacitors or charge pumps during power down.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional SRAM is used for high-speed data access, then data access speed is improved, but data retention capability deteriorates (data is lost when power is removed)

Engineering Contradiction:

Improvedata access speedVSAvoiddata retention capability

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The memory system is segmented into two distinct parts: a volatile SRAM portion for high-speed data access and a non-volatile memory portion for data retention. The SRAM portion handles frequent access operations while the non-volatile portion preserves data during power interruptions, allowing each segment to optimize its specific function without compromising the other

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent combines SRAM and non-volatile memory into a single integrated memory device with unified address and data buses. This merging allows the system to simultaneously provide the high-speed access characteristics of SRAM and the data retention capabilities of non-volatile memory, resolving the contradiction between speed and reliability

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If non-volatile memory is used for data retention, then data retention capability is improved, but data access speed deteriorates

Engineering Contradiction:

Improvedata retention capabilityVSAvoiddata access speed

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The memory system is segmented into two distinct parts: a volatile SRAM portion for high-speed data access, but a non-volatile memory portion for data retention. The SRAM portion handles frequent access operations while the non-volatile portion preserves data during power interruptions, allowing each segment to optimize its specific function without compromising the other

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Inventive Principle:

Principle #5Merging (Combining)

3Reliability

If external capacitors or charge pumps are added to maintain F-RAM during power down, then data retention capability is improved, but device complexity increases

Engineering Contradiction:

Improvedata retention capabilityVSAvoiddevice complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and eliminates the need for external capacitors or charge pumps by using a self-sufficient non-volatile memory portion that inherently maintains data during power down. The non-volatile memory's intrinsic data retention capability removes the requirement for additional external components, simplifying the overall device architecture

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The non-volatile memory portion serves itself by maintaining data retention capabilities without requiring external assistance from capacitors or charge pumps. The NV memory inherently preserves data during power interruptions, making the system self-sufficient and reducing overall device complexity

Inventive Principle:

Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables high-speed data access and retention, ensuring data integrity during power interruptions by automatically transferring data from the SRAM to the non-volatile memory cell for storage and retrieval, reducing power consumption and eliminating the need for external components.

Implementation Method 1

A ferroelectric capacitor-based nvSRAM cell integrates a volatile SRAM cell with a non-volatile memory cell, utilizing ferroelectric capacitors to store data even when power is unavailable

Methodology Applied

Scientific EffectFerroelectricity:

Data Source

PatentUS20160365145A1Non-Volatile Static RAM and Method of Operation Thereof

Publication Date: 2016.12.15 INFINEON TECHNOLOGIES LLC

AI summary

A memory device and array which includes a static random access memory (SRAM) circuit coupled to a non-volatile circuit, such as a ferroelectric-RAM (F-RAM) circuit, in which the F-RAM circuit stores a bit of data from the SRAM circuit during power-out periods, the F-RAM circuit is further coupled to bit-line(s) to output the bit of data stored in the F-RAM circuit when operation power is restored.