Ferroelectric Gate Stack With Oxygen Barrier for Thin Interfaces
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Solution Overview
Problem
Current semiconductor devices face limitations in achieving subthreshold swing less than 60 mV/dec due to the theoretical constraints, and ferroelectric field-effect transistors require a ferroelectric layer with a specific crystal structure to overcome these limitations, which is challenging to maintain during the manufacturing process.
Innovation Solution
A semiconductor device is designed with a ferroelectric layer that includes a stabilization layer and an oxygen diffusion barrier layer to enhance ferroelectric properties and prevent interfacial layer thickness increase during annealing, allowing for the sequential stacking of layers such as an interfacial layer, ferroelectric layer, stabilization layer, oxygen diffusion barrier layer, and threshold voltage control layer to achieve improved performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a ferroelectric layer is formed and annealed to achieve the desired crystal structure, then the ferroelectric property is improved, but the interfacial layer thickness increases which degrades device performance
Solution Approach 1:
An oxygen diffusion barrier layer is introduced as an intermediary between the interfacial layer and the ferroelectric layer. This barrier layer prevents oxygen from the ferroelectric layer from diffusing into the interfacial layer during annealing, thus maintaining the interfacial layer thickness while still allowing the ferroelectric layer to achieve its desired crystal structure through annealing.
Solution Approach 2:
The gate insulating layer is segmented into multiple distinct layers: an interfacial layer, an oxygen diffusion barrier layer, and a ferroelectric layer. This segmentation allows each layer to perform its specific function independently - the interfacial layer provides interface quality, the barrier layer prevents oxygen diffusion, and the ferroelectric layer provides the desired ferroelectric properties.
2Manufacturing precision
If the interfacial layer thickness is reduced to improve device performance, then the subthreshold swing improves, but the ferroelectric layer cannot be properly stabilized during annealing
Solution Approach 1:
The oxygen diffusion barrier layer serves as a protective intermediary that allows the interfacial layer to remain thin for improved device performance while preventing oxygen loss from the ferroelectric layer during annealing, thus maintaining ferroelectric phase stability despite the thin interfacial layer.
Solution Approach 2:
The oxygen diffusion barrier layer is placed beforehand between the interfacial layer and ferroelectric layer to cushion against oxygen diffusion during subsequent annealing processes. This pre-positioned barrier ensures that even with a thin interfacial layer, the ferroelectric layer remains stable throughout the annealing process.
3Device complexity
If conventional field-effect transistor design is used, then the device structure is simple, but the subthreshold swing cannot go below 60 mV/dec due to theoretical limitations
Solution Approach 1:
The gate insulating layer uses a composite structure combining an interfacial layer, an oxygen diffusion barrier layer, and a ferroelectric layer. This composite material approach enables the device to achieve subthreshold swing below the conventional 60 mV/dec limit by utilizing the negative capacitance effect of the ferroelectric layer, while the barrier layer ensures structural stability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enables semiconductor devices to achieve subthreshold swing less than 60 mV/dec by stabilizing the ferroelectric phase and preventing interfacial layer thickness increase, thereby improving device performance and reliability.
Implementation Method 1
a process of annealing the ferroelectric layer may be performed to form the desired phase having a certain crystal structure therein
Implementation Method 2
a ferroelectric layer capable of providing a negative capacitance characteristic when used as a gate insulating layer, has been considered. In order for a ferroelectric material to have a ferroelectric property, the ferroelectric material should have a phase with a certain crystal structure
Implementation Method 3
preventing oxygen from being diffused into the interfacial layer
Data Source
AI summary
A semiconductor device includes a substrate, a channel on or in the substrate, a source/drain pair respectively on opposite ends of the channel, and a gate structure on the channel between the source/drain pair, wherein the gate structure includes an interfacial layer, a ferroelectric layer, a stabilization layer, an oxygen diffusion barrier layer, and a threshold voltage control layer that are sequentially stacked on the channel.